spx5_rd
val = spx5_rd(sparx5, PTP_TWOSTEP_CTRL);
delay = spx5_rd(sparx5, PTP_TWOSTEP_STAMP_NSEC);
val = spx5_rd(sparx5, PTP_TWOSTEP_CTRL);
id = spx5_rd(sparx5, PTP_TWOSTEP_STAMP_NSEC);
id |= spx5_rd(sparx5, PTP_TWOSTEP_STAMP_SUBNS);
value = spx5_rd(sparx5, QSYS_CAL_CTRL);
val = spx5_rd(sparx5, DSM_TAXI_CAL_CFG(taxi));
len = DSM_TAXI_CAL_CFG_CAL_CUR_LEN_GET(spx5_rd(sparx5,
sparx5_update_counter(stats, spx5_rd(sparx5, XQS_CNT(addr)));
sparx5_update_counter(stats, spx5_rd(sparx5, XQS_CNT(addr)));
sparx5_update_counter(stats, spx5_rd(sparx5, XQS_CNT(addr)));
spx5_rd(sparx5, XQS_CNT(32)));
spx5_rd(sparx5, XQS_CNT(272)));
spx5_rd(sparx5, ANA_AC_PORT_STAT_LSB_CNT(portno,
db = spx5_rd(sparx5, FDMA_INTR_DB);
err = spx5_rd(sparx5, FDMA_INTR_ERR);
u32 err_type = spx5_rd(sparx5, FDMA_ERRORS);
return spx5_rd(sparx5, FDMA_PORT_CTRL(0));
cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
mach = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_0);
macl = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_1);
cfg2 = spx5_rd(sparx5, LRN_MAC_ACCESS_CFG_2);
return spx5_rd(sparx5, LRN_COMMON_ACCESS_CTRL);
value = spx5_rd(sparx5, HSCH_RESET_CFG);
sparx5->chip_id = spx5_rd(sparx5, GCB_CHIP_ID);
u32 val = spx5_rd(sparx5,
val = spx5_rd(sparx5, ANA_AC_PROBE_PORT_CFG(idx));
val |= (u64)spx5_rd(sparx5, ANA_AC_PROBE_PORT_CFG1(idx)) << 32;
u32 val = spx5_rd(sparx5, ANA_AC_PROBE_CFG(idx));
u32 val = spx5_rd(sparx5, QS_XTR_RD(grp));
*rxbuf = spx5_rd(sparx5, QS_XTR_RD(grp));
val = spx5_rd(sparx5, QS_INJ_STATUS);
val = spx5_rd(sparx5, QS_INJ_STATUS);
val = spx5_rd(port->sparx5, QS_INJ_STATUS);
while (spx5_rd(s5, QS_XTR_DATA_PRESENT) & BIT(XTR_QUEUE) && poll-- > 0)
ifh[i] = spx5_rd(sparx5, QS_XTR_RD(grp));
value = spx5_rd(sparx5, DEV2G5_PCS1G_ANEG_STATUS(portno));
value = spx5_rd(sparx5, DEV2G5_PCS1G_ANEG_CFG(portno));
value = spx5_rd(sparx5,
value = spx5_rd(sparx5, DEV2G5_PCS1G_STICKY(portno));
value = spx5_rd(sparx5, DEV2G5_PCS1G_LINK_STATUS(portno));
return ANA_L2_TSN_CFG_TSN_SFID_GET(spx5_rd(sparx5,
return ANA_L2_DLB_CFG_DLB_IDX_GET(spx5_rd(sparx5,
return ANA_AC_TSN_SF_CFG_TSN_SGID_GET(spx5_rd(sparx5,
return spx5_rd(sparx5, ANA_AC_SG_ACCESS_CTRL);
ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin));
curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL);
delay = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP);
val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL);
id = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP);
id |= spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP_SUBNS);
s = spx5_rd(sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin));
s |= spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin));
ns = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
value = spx5_rd(sparx5, HSCH_HSCH_LEAK_CFG(layer, group));
value = spx5_rd(sparx5, HSCH_SE_CONNECT(idx));
sys_clk_per_100ps = spx5_rd(sparx5, HSCH_SYS_CLK_PER);
value = spx5_rd(sparx5, HSCH_HSCH_TIMER_CFG(layer, group));
val = spx5_rd(sparx5, ANA_AC_SDLB_PUP_CTRL(group));
val = spx5_rd(sparx5, ANA_AC_SDLB_XLB_START(group));
val = spx5_rd(sparx5, ANA_AC_SDLB_XLB_NEXT(lb));
value = spx5_rd(sparx5, ANA_ACL_VCAP_S2_CFG(port->portno));
value = spx5_rd(sparx5,
value = spx5_rd(sparx5, ANA_ACL_SEC_LOOKUP_STICKY(lookup));
value = spx5_rd(sparx5, REW_ES0_CTRL);
value = spx5_rd(sparx5, REW_RTAG_ETAG_CTRL(port->portno));
value = spx5_rd(sparx5, EACL_VCAP_ES2_KEY_SEL(port->portno,
value = spx5_rd(sparx5, EACL_SEC_LOOKUP_STICKY(lookup));
value = spx5_rd(sparx5,
keystr[idx] = spx5_rd(sparx5,
mskstr[idx] = ~spx5_rd(sparx5,
actstr[idx] = spx5_rd(sparx5,
spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
keystr[idx] = spx5_rd(sparx5,
mskstr[idx] = ~spx5_rd(sparx5,
actstr[idx] = spx5_rd(sparx5,
spx5_rd(sparx5, ANA_ACL_CNT_A(start));
spx5_rd(sparx5, ANA_ACL_CNT_B(start));
spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));
counter = spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_GRN_PKTS)) +
spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_YEL_PKTS));
spx5_rd(sparx5, VCAP_ES0_VCAP_ENTRY_DAT(idx));
~spx5_rd(sparx5, VCAP_ES0_VCAP_MASK_DAT(idx));
spx5_rd(sparx5, VCAP_ES0_VCAP_ACTION_DAT(idx));
spx5_rd(sparx5, VCAP_ES0_VCAP_CNT_DAT(0));
spx5_rd(sparx5, VCAP_ES2_VCAP_ENTRY_DAT(idx));
~spx5_rd(sparx5, VCAP_ES2_VCAP_MASK_DAT(idx));
spx5_rd(sparx5, VCAP_ES2_VCAP_ACTION_DAT(idx));
spx5_rd(sparx5, EACL_ES2_CNT(start));
spx5_rd(sparx5, VCAP_ES2_VCAP_CNT_DAT(0));
read_poll_timeout(spx5_rd, value,
read_poll_timeout(spx5_rd, value,
read_poll_timeout(spx5_rd, value,
cores = spx5_rd(sparx5, VCAP_ES0_CORE_CNT);
cores = spx5_rd(sparx5, VCAP_ES2_CORE_CNT);
value = spx5_rd(sparx5, ANA_CL_ADV_CL_CFG(portno, lookup));
value = spx5_rd(sparx5, ANA_ACL_VCAP_S2_KEY_SEL(portno, lookup));
value = spx5_rd(sparx5, REW_RTAG_ETAG_CTRL(portno));
value = spx5_rd(sparx5, EACL_VCAP_ES2_KEY_SEL(portno, lookup));
portmask[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid));
portmask[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid));
portmask[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid));