arch/powerpc/platforms/cell/spufs/switch.c

116

spu_int_mask_set(spu, 0, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

117

spu_int_mask_set(spu, 1, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

118

spu_int_mask_set(spu, 2, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

1407

spu_int_mask_set(spu, 0, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

1408

spu_int_mask_set(spu, 1, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

1409

spu_int_mask_set(spu, 2, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

1769

spu_int_mask_set(spu, 0, csa->priv1.int_mask_class0_RW);

arch/powerpc/platforms/cell/spufs/switch.c

1770

spu_int_mask_set(spu, 1, csa->priv1.int_mask_class1_RW);

arch/powerpc/platforms/cell/spufs/switch.c

1771

spu_int_mask_set(spu, 2, csa->priv1.int_mask_class2_RW);

arch/powerpc/platforms/cell/spufs/switch.c

758

spu_int_mask_set(spu, 0, 0ul);

arch/powerpc/platforms/cell/spufs/switch.c

759

spu_int_mask_set(spu, 1, class1_mask);

arch/powerpc/platforms/cell/spufs/switch.c

760

spu_int_mask_set(spu, 2, 0ul);

arch/powerpc/platforms/ps3/spu.c

467

spu_int_mask_set(spu, class, old_mask & mask);

arch/powerpc/platforms/ps3/spu.c

475

spu_int_mask_set(spu, class, old_mask | mask);