drivers/clk/imx/clk-imx31.c

59

clk[spll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "spll", "ckih", base + MXC_CCM_SRPCTL);

drivers/clk/microchip/clk-core.c

733

struct pic32_sys_pll *spll;

drivers/clk/microchip/clk-core.c

736

spll = devm_kzalloc(core->dev, sizeof(*spll), GFP_KERNEL);

drivers/clk/microchip/clk-core.c

737

if (!spll)

drivers/clk/microchip/clk-core.c

740

spll->core = core;

drivers/clk/microchip/clk-core.c

741

spll->hw.init = &data->init_data;

drivers/clk/microchip/clk-core.c

742

spll->ctrl_reg = data->ctrl_reg + core->iobase;

drivers/clk/microchip/clk-core.c

743

spll->status_reg = data->status_reg + core->iobase;

drivers/clk/microchip/clk-core.c

744

spll->lock_mask = data->lock_mask;

drivers/clk/microchip/clk-core.c

747

spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK;

drivers/clk/microchip/clk-core.c

748

spll->idiv += 1;

drivers/clk/microchip/clk-core.c

750

clk = devm_clk_register(core->dev, &spll->hw);

drivers/clk/samsung/clk-exynos5420.c

1478

[spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK,

drivers/gpu/drm/amd/amdgpu/amdgpu.h

378

struct amdgpu_pll spll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

590

struct amdgpu_pll *spll = &adev->clock.spll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

636

spll->reference_freq =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

638

spll->reference_div = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

640

spll->pll_out_min =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

642

spll->pll_out_max =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

646

if (spll->pll_out_min == 0)

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

647

spll->pll_out_min = 64800;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

649

spll->pll_in_min =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

651

spll->pll_in_max =

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

654

spll->min_post_div = 1;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

655

spll->max_post_div = 1;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

656

spll->min_ref_div = 2;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

657

spll->max_ref_div = 0xff;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

658

spll->min_feedback_div = 4;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

659

spll->max_feedback_div = 0xff;

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

660

spll->best_vco = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

797

struct amdgpu_pll *spll = &adev->clock.spll;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

832

spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz);

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

834

spll->reference_freq = le32_to_cpu(smu_info->v40.core_refclk_10khz);

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

836

spll->reference_div = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

837

spll->min_post_div = 1;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

838

spll->max_post_div = 1;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

839

spll->min_ref_div = 2;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

840

spll->max_ref_div = 0xff;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

841

spll->min_feedback_div = 4;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

842

spll->max_feedback_div = 0xff;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

843

spll->best_vco = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

882

spll->reference_freq = le32_to_cpu(gfx_info->v30.golden_tsc_count_lower_refclk);

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

887

spll->reference_freq = le32_to_cpu(gfx_info->v22.rlc_gpu_timer_refclk);

drivers/gpu/drm/amd/amdgpu/cik.c

919

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/nv.c

313

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/si.c

1477

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/si.c

1731

unsigned vco_freq, ref_freq = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc15.c

347

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc21.c

259

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc24.c

98

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

113

return adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/amdgpu/vi.c

541

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5335

u32 reference_clock = adev->clock.spll.reference_freq;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1175

hw_state->spll =

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1199

switch (hw_state->spll & SPLL_FREQ_MASK) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1276

hw_state->wrpll, hw_state->spll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

1286

a->spll == b->spll;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

728

intel_de_write(display, SPLL_CTL, hw_state->spll);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

801

hw_state->spll = val;

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

192

u32 spll;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

175

clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

178

clk->spll = 0x00000000;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

193

nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

36

u32 spll;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

475

clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

482

clk_mask(hwsq, spll[0], 0xc03f0100,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

484

clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M);

drivers/gpu/drm/radeon/ci_dpm.c

1948

u32 ref_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

2966

table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ci_dpm.c

3125

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/cik.c

1707

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/ni_dpm.c

2012

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/r600.c

200

return rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/r600.c

227

if (rdev->clock.spll.reference_freq == 10000)

drivers/gpu/drm/radeon/radeon.h

271

struct radeon_pll spll;

drivers/gpu/drm/radeon/radeon_atombios.c

1135

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_atombios.c

1188

spll->reference_freq =

drivers/gpu/drm/radeon/radeon_atombios.c

1191

spll->reference_freq =

drivers/gpu/drm/radeon/radeon_atombios.c

1193

spll->reference_div = 0;

drivers/gpu/drm/radeon/radeon_atombios.c

1195

spll->pll_out_min =

drivers/gpu/drm/radeon/radeon_atombios.c

1197

spll->pll_out_max =

drivers/gpu/drm/radeon/radeon_atombios.c

1201

if (spll->pll_out_min == 0) {

drivers/gpu/drm/radeon/radeon_atombios.c

1203

spll->pll_out_min = 64800;

drivers/gpu/drm/radeon/radeon_atombios.c

1205

spll->pll_out_min = 20000;

drivers/gpu/drm/radeon/radeon_atombios.c

1208

spll->pll_in_min =

drivers/gpu/drm/radeon/radeon_atombios.c

1210

spll->pll_in_max =

drivers/gpu/drm/radeon/radeon_clocks.c

111

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

150

spll->reference_freq = mpll->reference_freq = p1pll->reference_freq;

drivers/gpu/drm/radeon/radeon_clocks.c

151

spll->reference_div = mpll->reference_div =

drivers/gpu/drm/radeon/radeon_clocks.c

186

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

214

if (spll->reference_div < 2)

drivers/gpu/drm/radeon/radeon_clocks.c

215

spll->reference_div =

drivers/gpu/drm/radeon/radeon_clocks.c

220

mpll->reference_div = spll->reference_div;

drivers/gpu/drm/radeon/radeon_clocks.c

233

spll->reference_freq = 1432;

drivers/gpu/drm/radeon/radeon_clocks.c

238

spll->reference_freq = 2700;

drivers/gpu/drm/radeon/radeon_clocks.c

267

spll->reference_div =

drivers/gpu/drm/radeon/radeon_clocks.c

270

mpll->reference_div = spll->reference_div;

drivers/gpu/drm/radeon/radeon_clocks.c

323

spll->min_post_div = 1;

drivers/gpu/drm/radeon/radeon_clocks.c

324

spll->max_post_div = 1;

drivers/gpu/drm/radeon/radeon_clocks.c

325

spll->min_ref_div = 2;

drivers/gpu/drm/radeon/radeon_clocks.c

326

spll->max_ref_div = 0xff;

drivers/gpu/drm/radeon/radeon_clocks.c

327

spll->min_feedback_div = 4;

drivers/gpu/drm/radeon/radeon_clocks.c

328

spll->max_feedback_div = 0xff;

drivers/gpu/drm/radeon/radeon_clocks.c

329

spll->best_vco = 0;

drivers/gpu/drm/radeon/radeon_clocks.c

355

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

356

int ref_div = spll->reference_div;

drivers/gpu/drm/radeon/radeon_clocks.c

376

req_clock += spll->reference_freq;

drivers/gpu/drm/radeon/radeon_clocks.c

377

req_clock /= (2 * spll->reference_freq);

drivers/gpu/drm/radeon/radeon_clocks.c

382

req_clock *= spll->reference_freq;

drivers/gpu/drm/radeon/radeon_clocks.c

42

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_clocks.c

48

fb_div *= spll->reference_freq;

drivers/gpu/drm/radeon/radeon_combios.c

720

struct radeon_pll *spll = &rdev->clock.spll;

drivers/gpu/drm/radeon/radeon_combios.c

747

spll->reference_freq = RBIOS16(pll_info + 0x1a);

drivers/gpu/drm/radeon/radeon_combios.c

748

spll->reference_div = RBIOS16(pll_info + 0x1c);

drivers/gpu/drm/radeon/radeon_combios.c

749

spll->pll_out_min = RBIOS32(pll_info + 0x1e);

drivers/gpu/drm/radeon/radeon_combios.c

750

spll->pll_out_max = RBIOS32(pll_info + 0x22);

drivers/gpu/drm/radeon/radeon_combios.c

753

spll->pll_in_min = RBIOS32(pll_info + 0x48);

drivers/gpu/drm/radeon/radeon_combios.c

754

spll->pll_in_max = RBIOS32(pll_info + 0x4c);

drivers/gpu/drm/radeon/radeon_combios.c

757

spll->pll_in_min = 40;

drivers/gpu/drm/radeon/radeon_combios.c

758

spll->pll_in_max = 500;

drivers/gpu/drm/radeon/radeon_kms.c

346

*value = rdev->clock.spll.reference_freq * 10;

drivers/gpu/drm/radeon/radeon_uvd.c

958

unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rs780_dpm.c

1012

u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /

drivers/gpu/drm/radeon/rs780_dpm.c

990

u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /

drivers/gpu/drm/radeon/rv6xx_dpm.c

163

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

428

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

551

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv6xx_dpm.c

840

u32 ref_clk = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv730_dpm.c

49

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv740_dpm.c

130

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv770.c

788

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/rv770_dpm.c

502

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/si.c

1320

u32 reference_clock = rdev->clock.spll.reference_freq;

drivers/gpu/drm/radeon/si_dpm.c

4740

u32 reference_clock = rdev->clock.spll.reference_freq;