drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1521

struct spl_in *spl_in = &pipe_ctx->plane_res.spl_in;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1532

translate_SPL_in_params_from_pipe_ctx(pipe_ctx, spl_in);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1535

&spl_in->debug.visual_confirm_base_offset,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1536

&spl_in->debug.visual_confirm_dpp_offset);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1540

res = spl_calculate_scaler_params(spl_in, spl_out);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

100

spl_in->basic_out.view_format = (enum spl_view_3d)stream->view_format;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

102

populate_splrect_from_rect(&spl_in->basic_in.clip_rect, &plane_state->clip_rect);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

104

populate_splrect_from_rect(&spl_in->basic_out.src_rect, &stream->src);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

106

populate_splrect_from_rect(&spl_in->basic_out.dst_rect, &stream->dst);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

108

spl_in->basic_in.rotation = (enum spl_rotation_angle)plane_state->rotation;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

110

populate_splrect_from_rect(&spl_in->basic_in.src_rect, &plane_state->src_rect);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

112

populate_splrect_from_rect(&spl_in->basic_in.dst_rect, &plane_state->dst_rect);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

114

spl_in->basic_in.horizontal_mirror = plane_state->horizontal_mirror;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

117

spl_in->basic_in.num_h_slices_recout_width_align.use_recout_width_aligned = false;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

118

spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_num_h_slices =

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

122

spl_in->basic_in.mpc_h_slice_index = 0;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

124

spl_in->basic_in.mpc_h_slice_index = resource_get_mpc_slice_index(pipe_ctx);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

126

populate_splrect_from_rect(&spl_in->basic_out.odm_slice_rect, &odm_slice_src);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

127

spl_in->basic_out.odm_combine_factor = 0;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

128

spl_in->odm_slice_index = resource_get_odm_slice_index(pipe_ctx);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

130

spl_in->basic_out.output_size.width =

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

133

spl_in->basic_out.output_size.height =

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

135

spl_in->basic_out.max_downscale_src_width =

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

137

spl_in->basic_out.always_scale = pipe_ctx->stream->ctx->dc->debug.always_scale;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

139

spl_in->basic_out.alpha_en = pipe_ctx->plane_res.scl_data.lb_params.alpha_en;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

140

spl_in->basic_out.use_two_pixels_per_container = pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

142

populate_spltaps_from_taps(&spl_in->scaling_quality, &plane_state->scaling_quality);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

144

spl_in->prefer_easf = pipe_ctx->stream->ctx->dc->config.prefer_easf;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

145

spl_in->disable_easf = false;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

147

spl_in->prefer_easf = false;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

149

spl_in->disable_easf = true;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

151

spl_in->override_easf = true;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

156

spl_in->adaptive_sharpness.enable = false;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

158

spl_in->adaptive_sharpness.enable = true;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

159

spl_in->adaptive_sharpness.sharpness_level = 0;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

162

spl_in->adaptive_sharpness.sharpness_range.sdr_rgb_min = plane_state->sharpness_range.sdr_rgb_min;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

163

spl_in->adaptive_sharpness.sharpness_range.sdr_rgb_max = plane_state->sharpness_range.sdr_rgb_max;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

164

spl_in->adaptive_sharpness.sharpness_range.sdr_rgb_mid = plane_state->sharpness_range.sdr_rgb_mid;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

165

spl_in->adaptive_sharpness.sharpness_range.sdr_yuv_min = plane_state->sharpness_range.sdr_yuv_min;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

166

spl_in->adaptive_sharpness.sharpness_range.sdr_yuv_max = plane_state->sharpness_range.sdr_yuv_max;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

167

spl_in->adaptive_sharpness.sharpness_range.sdr_yuv_mid = plane_state->sharpness_range.sdr_yuv_mid;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

168

spl_in->adaptive_sharpness.sharpness_range.hdr_rgb_min = plane_state->sharpness_range.hdr_rgb_min;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

169

spl_in->adaptive_sharpness.sharpness_range.hdr_rgb_max = plane_state->sharpness_range.hdr_rgb_max;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

170

spl_in->adaptive_sharpness.sharpness_range.hdr_rgb_mid = plane_state->sharpness_range.hdr_rgb_mid;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

175

spl_in->adaptive_sharpness.enable = true;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

176

spl_in->adaptive_sharpness.sharpness_level = force_sharpness_level;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

178

spl_in->adaptive_sharpness.enable = false;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

179

spl_in->adaptive_sharpness.sharpness_level = 0;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

181

spl_in->adaptive_sharpness.enable = true;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

182

spl_in->adaptive_sharpness.sharpness_level = plane_state->sharpness_level;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

187

spl_in->lls_pref = pipe_ctx->stream->ctx->dc->debug.force_lls;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

189

spl_in->lls_pref = plane_state->linear_light_scaling;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

192

spl_in->basic_in.cositing = pipe_ctx->stream->ctx->dc->debug.force_cositing - 1;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

194

spl_in->basic_in.cositing = plane_state->cositing;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

196

spl_in->basic_in.tf_type = (enum spl_transfer_func_type) plane_state->in_transfer_func.type;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

197

spl_in->basic_in.tf_predefined_type = (enum spl_transfer_func_predefined) plane_state->in_transfer_func.tf;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

199

spl_in->h_active = pipe_ctx->plane_res.scl_data.h_active;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

200

spl_in->v_active = pipe_ctx->plane_res.scl_data.v_active;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

202

spl_in->sharpen_policy = (enum sharpen_policy)plane_state->adaptive_sharpness_policy;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

203

spl_in->debug.scale_to_sharpness_policy =

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

209

spl_in->is_fullscreen = pipe_ctx->stream->sharpening_required;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

210

spl_in->is_hdr_on = dm_helpers_is_hdr_on(pipe_ctx->stream->ctx, pipe_ctx->stream);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

211

spl_in->sdr_white_level_nits = plane_state->sdr_white_level_nits;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

76

void translate_SPL_in_params_from_pipe_ctx(struct pipe_ctx *pipe_ctx, struct spl_in *spl_in)

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

86

spl_in->callbacks = dcn2_spl_callbacks;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

89

spl_in->callbacks = dcn32_spl_callbacks;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

92

spl_in->callbacks = dcn401_spl_callbacks;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

95

spl_in->callbacks = dcn2_spl_callbacks;

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

98

populate_splformat_from_format(&spl_in->basic_in.format, pipe_ctx->plane_res.scl_data.format);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.h

15

void translate_SPL_in_params_from_pipe_ctx(struct pipe_ctx *pipe_ctx, struct spl_in *spl_in);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

376

struct spl_in spl_in;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1002

skip_easf = enable_easf(spl_in, spl_scratch);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1013

if (spl_is_video_format(spl_in->basic_in.format)) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1026

if (spl_in->override_easf) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1046

if (spl_is_yuv420(spl_in->basic_in.format))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1051

spl_in->callbacks.spl_calc_lb_num_partitions(spl_in->basic_out.alpha_en, &spl_scratch->scl_data,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1108

if (spl_is_video_format(spl_in->basic_in.format)) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1146

*enable_isharp = spl_get_isharp_en(spl_in, spl_scratch);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1147

if (!*enable_isharp && !spl_in->basic_out.always_scale) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1246

static void spl_set_dscl_prog_data(struct spl_in *spl_in, struct spl_scratch *spl_scratch,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1264

dscl_prog_data->dscl_mode = spl_get_dscl_mode(spl_in, data, enable_isharp,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1268

spl_set_black_color_data(spl_in->basic_in.format, scl_black_color);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

158

const struct spl_rect *stream_src = &spl_in->basic_out.src_rect;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

159

const struct spl_rect *stream_dst = &spl_in->basic_out.dst_rect;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1827

static bool spl_calculate_number_of_taps(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1833

spl_scratch->scl_data.h_active = spl_in->h_active;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1834

spl_scratch->scl_data.v_active = spl_in->v_active;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1839

spl_calculate_recout(spl_in, spl_scratch, spl_out);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1841

spl_calculate_scaling_ratios(spl_in, spl_scratch, spl_out);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1843

spl_opp_adjust_rect(&spl_scratch->scl_data.recout, &spl_in->basic_in.opp_recout_adjust);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1845

spl_calculate_viewport_size(spl_in, spl_scratch);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1848

spl_in->basic_out.max_downscale_src_width, spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1849

spl_scratch, &spl_in->scaling_quality, enable_easf_v,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1855

bool SPL_NAMESPACE(spl_calculate_scaler_params(struct spl_in *spl_in, struct spl_out *spl_out))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1868

res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1876

spl_calculate_inits_and_viewports(spl_in, &spl_scratch);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1878

spl_handle_3d_recout(spl_in, &spl_scratch.scl_data.recout);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

188

struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1880

spl_clamp_viewport(&spl_scratch.scl_data.viewport, spl_in->min_viewport_size);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1883

spl_set_dscl_prog_data(spl_in, &spl_scratch, spl_out, enable_easf_v, enable_easf_h, enable_isharp);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1888

if (spl_in->lls_pref == LLS_PREF_YES) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1889

if (spl_in->is_hdr_on)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1894

if (spl_in->is_hdr_on)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1901

spl_set_easf_data(&spl_scratch, spl_out, enable_easf_v, enable_easf_h, spl_in->lls_pref,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1902

spl_in->basic_in.format, setup, spl_in->sdr_white_level_nits);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1912

spl_set_isharp_data(spl_out->dscl_prog_data, spl_in->adaptive_sharpness, enable_isharp,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1913

spl_in->lls_pref, spl_in->basic_in.format, data, isharp_scale_ratio, setup,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1914

spl_in->debug.scale_to_sharpness_policy);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

192

spl_in->basic_in.num_h_slices_recout_width_align.use_recout_width_aligned;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1920

bool SPL_NAMESPACE(spl_get_number_of_taps(struct spl_in *spl_in, struct spl_out *spl_out))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

1930

res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

194

spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_num_h_slices;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

196

spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_recout_width_align;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

197

int mpc_slice_idx = spl_in->basic_in.mpc_h_slice_index;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

201

if (spl_in->basic_in.custom_width != 0) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

202

mpc_rec.width = spl_in->basic_in.custom_width;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

203

mpc_rec.x = spl_in->basic_in.custom_x;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

223

spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE ||

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

230

mpc_slice_idx > epimo && spl_in->basic_in.custom_width == 0) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

235

if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

242

static struct spl_rect calculate_odm_slice_in_timing_active(struct spl_in *spl_in)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

244

int odm_slice_count = spl_in->basic_out.odm_combine_factor;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

245

int odm_slice_idx = spl_in->odm_slice_index;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

247

int h_active = spl_in->basic_out.output_size.width;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

248

int v_active = spl_in->basic_out.output_size.height;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

252

if (spl_in->basic_out.odm_combine_factor > 0) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

258

if (spl_in->basic_out.use_two_pixels_per_container && (odm_slice_width % 2))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

273

return spl_in->basic_out.odm_slice_rect;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

276

static void spl_calculate_recout(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

404

plane_clip = calculate_plane_rec_in_timing_active(spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

405

&spl_in->basic_in.clip_rect);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

408

&spl_in->basic_out.dst_rect);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

410

spl_in, &plane_clip);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

411

odm_slice = calculate_odm_slice_in_timing_active(spl_in);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

423

spl_in->debug.visual_confirm_base_offset;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

425

spl_in->debug.visual_confirm_dpp_offset;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

433

static void spl_calculate_scaling_ratios(struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

437

const int in_w = spl_in->basic_out.src_rect.width;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

438

const int in_h = spl_in->basic_out.src_rect.height;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

439

const int out_w = spl_in->basic_out.dst_rect.width;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

440

const int out_h = spl_in->basic_out.dst_rect.height;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

441

struct spl_rect surf_src = spl_in->basic_in.src_rect;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

444

if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 ||

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

445

spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

450

spl_in->basic_in.dst_rect.width));

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

453

spl_in->basic_in.dst_rect.height));

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

455

if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

457

else if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

468

if (spl_is_yuv420(spl_in->basic_in.format)) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

497

static void spl_calculate_viewport_size(struct spl_in *spl_in, struct spl_scratch *spl_scratch)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

507

if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 ||

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

508

spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

606

static void spl_calculate_inits_and_viewports(struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

609

struct spl_rect src = spl_in->basic_in.src_rect;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

614

struct spl_rect odm_slice = calculate_odm_slice_in_timing_active(spl_in);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

615

int vpc_div = spl_is_subsampled_format(spl_in->basic_in.format) ? 2 : 1;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

623

spl_in, &spl_in->basic_in.dst_rect);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

637

spl_in->basic_in.rotation,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

638

spl_in->basic_in.horizontal_mirror,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

643

if (spl_is_subsampled_format(spl_in->basic_in.format)) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

650

switch (spl_in->basic_in.cositing) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

730

static void spl_handle_3d_recout(struct spl_in *spl_in, struct spl_rect *recout)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

737

if (spl_in->basic_in.mpc_h_slice_index) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

738

SPL_ASSERT(spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_0 ||

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

739

(spl_in->basic_out.view_format != SPL_VIEW_3D_TOP_AND_BOTTOM &&

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

740

spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE));

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

741

if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

743

else if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

759

static enum scl_mode spl_get_dscl_mode(const struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

764

enum spl_pixel_format pixel_format = spl_in->basic_in.format;

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

771

&& !spl_in->basic_out.always_scale

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

787

if (data->ratios.horz.value == one && data->ratios.vert.value == one && !spl_in->basic_out.always_scale)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

804

static bool enable_easf(struct spl_in *spl_in, struct spl_scratch *spl_scratch)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

810

if (spl_in->disable_easf)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

827

if (spl_in->lls_pref == LLS_PREF_DONT_CARE)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

828

spl_choose_lls_policy(spl_in->basic_in.format,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

829

&spl_in->lls_pref);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

832

if (spl_in->lls_pref != LLS_PREF_YES && !spl_in->prefer_easf)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

839

static bool spl_is_video_fullscreen(struct spl_in *spl_in)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

841

if (spl_is_video_format(spl_in->basic_in.format) && spl_in->is_fullscreen)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

846

static bool spl_get_isharp_en(struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

853

bool fullscreen = spl_is_video_fullscreen(spl_in);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

856

if (spl_in->adaptive_sharpness.enable == false)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

872

if (!spl_is_video_format(spl_in->basic_in.format) &&

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

873

(spl_in->sharpen_policy == SHARPEN_YUV))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

875

else if ((spl_is_video_format(spl_in->basic_in.format) && !fullscreen) &&

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

876

(spl_in->sharpen_policy == SHARPEN_RGB_FULLSCREEN_YUV))

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

878

else if (!spl_in->is_fullscreen &&

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

879

spl_in->sharpen_policy == SHARPEN_FULLSCREEN_ALL)

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

94

struct spl_in *spl_in,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

971

int max_downscale_src_width, struct spl_in *spl_in, struct spl_scratch *spl_scratch,

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

980

bool is_subsampled = spl_is_subsampled_format(spl_in->basic_in.format);

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c

993

if (spl_in->scaling_quality.integer_scaling) {

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.h

15

bool SPL_NAMESPACE(spl_calculate_scaler_params(struct spl_in *spl_in, struct spl_out *spl_out));

drivers/gpu/drm/amd/display/dc/sspl/dc_spl.h

17

bool SPL_NAMESPACE(spl_get_number_of_taps(struct spl_in *spl_in, struct spl_out *spl_out));