smi_read
control = smi_read(IR_Init_Reg);
ir_count = (u8)smi_read(IR_Data_Cnt);
data = smi_read(IR_DATA_BUFFER_BASE + (index * 4));
return (smi_read(sw_ctl) & SW_I2C_MSK_DAT_IN) ? 1 : 0;
return (smi_read(sw_ctl) & SW_I2C_MSK_CLK_IN) ? 1 : 0;
port_mux = smi_read(MUX_MODE_CTRL);
dmaManagement = smi_read(port->DMA_MANAGEMENT);
finishedData = smi_read(port->DMA_CHAN0_TRANS_STATE);
finishedData = smi_read(port->DMA_CHAN1_TRANS_STATE);
port_ctrl = smi_read(VIDEO_CTRL_STATUS_A);
port_ctrl = smi_read(MPEG2_CTRL_A);
port_ctrl = smi_read(VIDEO_CTRL_STATUS_B);
port_ctrl = smi_read(MPEG2_CTRL_B);
u32 intr_status = smi_read(MSI_INT_STATUS);
int_stat = smi_read(MSI_INT_STATUS);
dwCtrl = smi_read(sw_ctl);
dwCtrl = smi_read(sw_ctl);
dmaManagement = smi_read(port->DMA_MANAGEMENT);