snd_ymfpci_readw
return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
secondary, snd_ymfpci_readw(chip, reg));
status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
(snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
(snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);