sl811_write
sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_IRQ_ENABLE,
sl811_write(sl811, SL11H_IRQ_ENABLE,
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_IRQ_ENABLE,
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
sl811_write(sl811, bank + SL11H_HOSTCTLREG,
sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
sl811_write(sl811, bank + SL11H_HOSTCTLREG,
sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),