CS4231P
wss_outb(chip, CS4231P(STATUS), 0);
while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
wss_inb(chip, CS4231P(STATUS));
wss_outb(chip, CS4231P(STATUS), 0);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
wss_outb(chip, CS4231P(STATUS), 0);
timeout = wss_inb(chip, CS4231P(REGSEL));
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wss_outb(chip, CS4231P(REG), value);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wss_outb(chip, CS4231P(REG), value);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
return wss_inb(chip, CS4231P(REG));
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
wss_outb(chip, CS4231P(REG),
wss_outb(chip, CS4231P(REG), val);
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
wss_outb(chip, CS4231P(REG),
return wss_inb(chip, CS4231P(REG));
res = wss_inb(chip, CS4231P(REG));
wss_inb(chip, CS4231P(REGSEL)),
wss_inb(chip, CS4231P(STATUS)));
wss_inb(chip, CS4231P(REGSEL));
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
timeout = wss_inb(chip, CS4231P(REGSEL));
wss_outb(chip, CS4231P(REGSEL),
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
(long)CS4231P(REGSEL));
timeout = wss_inb(chip, CS4231P(REGSEL));
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
wss_inb(chip, CS4231P(REGSEL)));
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */