CS42L42_TIPSENSE_CTL
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_TIPSENSE_CTL, 0x02 },
regmap_update_bits(cs42l42->regmap, CS42L42_TIPSENSE_CTL,
REG_SEQ0(CS42L42_TIPSENSE_CTL, 0x02),
case CS42L42_TIPSENSE_CTL:
{ CS42L42_TIPSENSE_CTL, 0x02 },