CS42L42_PWR_CTL3
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_PWR_CTL3, 0x20 },
regmap_clear_bits(cs42l42->regmap, CS42L42_PWR_CTL3, CS42L42_SW_CLK_STP_STAT_SEL_MASK);
case CS42L42_PWR_CTL3:
{ CS42L42_PWR_CTL3, 0x20 },
{ CS42L42_PWR_CTL3, 0x20 },