drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h

238

int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1939

.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,

drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1442

ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false);

drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3342

.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

1432

ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false);

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

3155

.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1928

ret = smu_v11_0_set_soft_freq_limited_range(smu,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1938

ret = smu_v11_0_set_soft_freq_limited_range(smu,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1948

ret = smu_v11_0_set_soft_freq_limited_range(smu,