smu_cmn_to_asic_specific_index
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_index = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_index = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
pwr_source = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
if ((smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GetDcModeMaxDpmFreq) < 0) ||
(smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GetMaxDpmFreq) < 0))
clk_id = smu_cmn_to_asic_specific_index(smu,
power_src = smu_cmn_to_asic_specific_index(smu,
power_src = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
pwr_source = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
if ((smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GetDcModeMaxDpmFreq) < 0) ||
(smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GetMaxDpmFreq) < 0))
clk_id = smu_cmn_to_asic_specific_index(smu,
power_src = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(
clk_id = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
pwr_source = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
power_src = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
pwr_source = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
clk_id = smu_cmn_to_asic_specific_index(smu,
power_src = smu_cmn_to_asic_specific_index(smu,
int table_id = smu_cmn_to_asic_specific_index(smu,
int table_id = smu_cmn_to_asic_specific_index(smu,
workload_type = smu_cmn_to_asic_specific_index(smu,
feature_id = smu_cmn_to_asic_specific_index(smu,
feature_id = smu_cmn_to_asic_specific_index(smu,
index = smu_cmn_to_asic_specific_index(smu,
feature_id = smu_cmn_to_asic_specific_index(smu,
feature_index = smu_cmn_to_asic_specific_index(smu,
skipped_feature_id = smu_cmn_to_asic_specific_index(smu,
int smu_cmn_to_asic_specific_index(struct smu_context *smu,