CS42L42_MIC_DET_CTL1
{ CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_MIC_DET_CTL1, 0xB6 },
regcache_sync_region(cs42l42->regmap, CS42L42_MIC_DET_CTL1, CS42L42_MIC_DET_CTL1);
{ CS42L42_MIC_DET_CTL1, 0x1F },
CS42L42_MIC_DET_CTL1,
CS42L42_MIC_DET_CTL1,
CS42L42_MIC_DET_CTL1,
regmap_update_bits(cs42l42->regmap, CS42L42_MIC_DET_CTL1,
REG_SEQ0(CS42L42_MIC_DET_CTL1, 0x9F),
regcache_sync_region(cs42l42->regmap, CS42L42_MIC_DET_CTL1, CS42L42_MIC_DET_CTL1);
case CS42L42_MIC_DET_CTL1:
{ CS42L42_MIC_DET_CTL1, 0x1F },