smsc9420_reg_write
smsc9420_reg_write(pd, HASHH, hash_hi);
smsc9420_reg_write(pd, HASHL, hash_lo);
smsc9420_reg_write(pd, HASHH, 0);
smsc9420_reg_write(pd, HASHL, 0);
smsc9420_reg_write(pd, MAC_CR, mac_cr);
smsc9420_reg_write(pd, FLOW, flow);
smsc9420_reg_write(pd, MAC_CR, mac_cr);
smsc9420_reg_write(pd, TX_BASE_ADDR, pd->tx_dma_addr);
smsc9420_reg_write(pd, MII_ACCESS, addr);
smsc9420_reg_write(pd, VLAN1, ETH_P_8021Q);
smsc9420_reg_write(pd, COE_CR, coe);
smsc9420_reg_write(pd, RX_BASE_ADDR, pd->rx_dma_addr);
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, INT_CTL, 0);
smsc9420_reg_write(pd, DMAC_INTR_ENA, 0);
smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF);
smsc9420_reg_write(pd, MAC_CR, 0);
smsc9420_reg_write(pd, GPIO_CFG,
smsc9420_reg_write(pd, BUS_MODE, bus_mode);
smsc9420_reg_write(pd, BUS_CFG, BUS_CFG_RXTXWEIGHT_4_1);
smsc9420_reg_write(pd, DMAC_CONTROL,
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, INT_CTL, int_ctl);
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, MAC_CR, mac_cr);
smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
smsc9420_reg_write(pd, RX_POLL_DEMAND, 1);
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, MII_DATA, (u32)val);
smsc9420_reg_write(pd, MII_ACCESS, addr);
smsc9420_reg_write(pd, E2P_CMD,
smsc9420_reg_write(pd, GPIO_CFG, temp);
smsc9420_reg_write(pd, E2P_CMD, e2cmd);
smsc9420_reg_write(pd, E2P_DATA, (u32)data);
smsc9420_reg_write(pd, ADDRH, mac_high16);
smsc9420_reg_write(pd, ADDRL, mac_low32);
smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
smsc9420_reg_write(pd, DMAC_STATUS, DMAC_STS_TXPS_);
smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
smsc9420_reg_write(pd, MAC_CR, mac_cr);
smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
smsc9420_reg_write(pd, MAC_CR, mac_cr);
smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
smsc9420_reg_write(pd, DMAC_STATUS, DMAC_STS_RXPS_);
smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
smsc9420_reg_write(pd, DMAC_STATUS, ints_to_clear);
smsc9420_reg_write(pd, INT_CTL, int_ctl);
smsc9420_reg_write(pd, INT_STAT, INT_STAT_SW_INT_);
smsc9420_reg_write(pd, BUS_MODE, BUS_MODE_SWR_);
smsc9420_reg_write(pd, INT_CFG, int_cfg);
smsc9420_reg_write(pd, RX_POLL_DEMAND, 1);
smsc9420_reg_write(pd, DMAC_INTR_ENA, dma_intr_ena);
smsc9420_reg_write(pd, TX_POLL_DEMAND, 1);