smsc9420_reg_read
smsc9420_reg_read(pd, ID_REV);
u32 mac_cr = smsc9420_reg_read(pd, MAC_CR);
if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) {
smsc9420_reg_read(pd, VLAN1));
u32 coe = smsc9420_reg_read(pd, COE_CR) | RX_COE_EN;
if (!(smsc9420_reg_read(pd, MII_ACCESS) &
reg = (u16)smsc9420_reg_read(pd, MII_DATA);
int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_;
int_ctl = smsc9420_reg_read(pd, INT_CTL) | INT_CTL_SW_INT_EN_;
int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
mac_cr = smsc9420_reg_read(pd, MAC_CR) | MAC_CR_TXEN_ | MAC_CR_RXEN_;
dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_;
int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) {
id_rev = smsc9420_reg_read(pd, ID_REV);
if (!(smsc9420_reg_read(pd, MII_ACCESS) &
if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
if (!(smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_))
regs->version = smsc9420_reg_read(pd, ID_REV);
data[j++] = smsc9420_reg_read(pd, i);
unsigned int temp = smsc9420_reg_read(pd, GPIO_CFG);
if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
e2cmd = smsc9420_reg_read(pd, E2P_CMD);
data[address] = smsc9420_reg_read(pd, E2P_DATA);
u32 mac_high16 = smsc9420_reg_read(pd, ADDRH);
u32 mac_low32 = smsc9420_reg_read(pd, ADDRL);
dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_TS_)
dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_TXEN_);
dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_RXEN_);
dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_RS_)
int_cfg = smsc9420_reg_read(pd, INT_CFG);
int_sts = smsc9420_reg_read(pd, INT_STAT);
u32 status = smsc9420_reg_read(pd, DMAC_STATUS);
u32 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
int_ctl = smsc9420_reg_read(pd, INT_CTL);
smsc9420_reg_read(pd, BUS_MODE);
if (smsc9420_reg_read(pd, BUS_MODE) & BUS_MODE_SWR_)
int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_);
drop_frame_cnt = smsc9420_reg_read(pd, MISS_FRAME_CNTR);
dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA);
u32 counter = smsc9420_reg_read(pd, MISS_FRAME_CNTR);
u32 mac_cr = smsc9420_reg_read(pd, MAC_CR);