smc_state - Linux

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2394

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2417

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2422

smc_state->levels[0].dpm2.MaxPS = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2423

smc_state->levels[0].dpm2.NearTDPDec = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2424

smc_state->levels[0].dpm2.AboveSafeInc = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2425

smc_state->levels[0].dpm2.BelowSafeInc = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2426

smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2475

smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2476

smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2477

smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2478

smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2479

smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2487

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2498

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2538

smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2539

smc_state->levels[i].SQPowerThrottle_2 = cpu_to_be32(sq_power_throttle2);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5503

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5510

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5512

smc_state->levels[ps->performance_level_count - 1].bSP =

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5623

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5637

smc_state->levels[0].aT = cpu_to_be32(a_t);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5641

smc_state->levels[0].aT = cpu_to_be32(0);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5657

a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_AT__CG_R_MASK;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5659

smc_state->levels[i].aT = cpu_to_be32(a_t);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5664

smc_state->levels[i + 1].aT = cpu_to_be32(a_t);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5722

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5740

smc_state->flags |= PPSMC_SWSTATE_FLAG_UVD;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5746

smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5748

smc_state->levelCount = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5753

smc_state->levels[i].stateFlags |= PPSMC_STATEFLAG_DEEPSLEEP_BYPASS;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5755

smc_state->levels[i].stateFlags |= PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5760

&smc_state->levels[i]);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5761

smc_state->levels[i].arbRefreshState =

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5768

smc_state->levels[i].displayWatermark =

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5772

smc_state->levels[i].displayWatermark = (i < 2) ?

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5776

smc_state->levels[i].ACIndex = SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5778

smc_state->levels[i].ACIndex = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5780

smc_state->levelCount++;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5787

si_populate_smc_sp(adev, amdgpu_state, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5789

ret = si_populate_power_containment_values(adev, amdgpu_state, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5793

ret = si_populate_sq_ramping_values(adev, amdgpu_state, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5797

return si_populate_smc_t(adev, amdgpu_state, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5808

SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5809

size_t state_size = struct_size(smc_state, levels,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5811

memset(smc_state, 0, state_size);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5813

ret = si_convert_power_state_to_smc(adev, amdgpu_new_state, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5817

return amdgpu_si_copy_bytes_to_smc(adev, address, (u8 *)smc_state,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5830

struct SISLANDS_SMC_SWSTATE_SINGLE *smc_state = &si_pi->smc_statetable.ULVState;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5833

memset(smc_state, 0, state_size);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5835

ret = si_populate_ulv_state(adev, smc_state);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5837

ret = amdgpu_si_copy_bytes_to_smc(adev, address, (u8 *)smc_state,

drivers/gpu/drm/radeon/cypress_dpm.c

767

RV770_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/cypress_dpm.c

774

smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;

drivers/gpu/drm/radeon/cypress_dpm.c

778

&smc_state->levels[0],

drivers/gpu/drm/radeon/cypress_dpm.c

785

&smc_state->levels[1],

drivers/gpu/drm/radeon/cypress_dpm.c

792

&smc_state->levels[2],

drivers/gpu/drm/radeon/cypress_dpm.c

797

smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;

drivers/gpu/drm/radeon/cypress_dpm.c

798

smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2;

drivers/gpu/drm/radeon/cypress_dpm.c

799

smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3;

drivers/gpu/drm/radeon/cypress_dpm.c

802

smc_state->levels[0].ACIndex = 2;

drivers/gpu/drm/radeon/cypress_dpm.c

803

smc_state->levels[1].ACIndex = 3;

drivers/gpu/drm/radeon/cypress_dpm.c

804

smc_state->levels[2].ACIndex = 4;

drivers/gpu/drm/radeon/cypress_dpm.c

806

smc_state->levels[0].ACIndex = 0;

drivers/gpu/drm/radeon/cypress_dpm.c

807

smc_state->levels[1].ACIndex = 0;

drivers/gpu/drm/radeon/cypress_dpm.c

808

smc_state->levels[2].ACIndex = 0;

drivers/gpu/drm/radeon/cypress_dpm.c

811

rv770_populate_smc_sp(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/cypress_dpm.c

813

return rv770_populate_smc_t(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2300

NISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/ni_dpm.c

2307

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

drivers/gpu/drm/radeon/ni_dpm.c

2309

smc_state->levels[ps->performance_level_count - 1].bSP =

drivers/gpu/drm/radeon/ni_dpm.c

2396

NISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/ni_dpm.c

2411

smc_state->levels[0].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/ni_dpm.c

2415

smc_state->levels[0].aT = cpu_to_be32(0);

drivers/gpu/drm/radeon/ni_dpm.c

2440

a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK;

drivers/gpu/drm/radeon/ni_dpm.c

2442

smc_state->levels[i].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/ni_dpm.c

2448

smc_state->levels[i + 1].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/ni_dpm.c

2456

NISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/ni_dpm.c

2477

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/radeon/ni_dpm.c

2499

smc_state->levels[0].dpm2.MaxPS = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2500

smc_state->levels[0].dpm2.NearTDPDec = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2501

smc_state->levels[0].dpm2.AboveSafeInc = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2502

smc_state->levels[0].dpm2.BelowSafeInc = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2503

smc_state->levels[0].stateFlags |= power_boost_limit ? PPSMC_STATEFLAG_POWERBOOST : 0;

drivers/gpu/drm/radeon/ni_dpm.c

2527

smc_state->levels[i].dpm2.MaxPS =

drivers/gpu/drm/radeon/ni_dpm.c

2529

smc_state->levels[i].dpm2.NearTDPDec = NISLANDS_DPM2_NEAR_TDP_DEC;

drivers/gpu/drm/radeon/ni_dpm.c

2530

smc_state->levels[i].dpm2.AboveSafeInc = NISLANDS_DPM2_ABOVE_SAFE_INC;

drivers/gpu/drm/radeon/ni_dpm.c

2531

smc_state->levels[i].dpm2.BelowSafeInc = NISLANDS_DPM2_BELOW_SAFE_INC;

drivers/gpu/drm/radeon/ni_dpm.c

2532

smc_state->levels[i].stateFlags |=

drivers/gpu/drm/radeon/ni_dpm.c

2542

NISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/ni_dpm.c

2554

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/radeon/ni_dpm.c

2591

smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle);

drivers/gpu/drm/radeon/ni_dpm.c

2592

smc_state->levels[i].SQPowerThrottle_2 = cpu_to_be32(sq_power_throttle2);

drivers/gpu/drm/radeon/ni_dpm.c

2630

NISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/ni_dpm.c

2639

smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;

drivers/gpu/drm/radeon/ni_dpm.c

2641

smc_state->levelCount = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2648

&smc_state->levels[i]);

drivers/gpu/drm/radeon/ni_dpm.c

2649

smc_state->levels[i].arbRefreshState =

drivers/gpu/drm/radeon/ni_dpm.c

2656

smc_state->levels[i].displayWatermark =

drivers/gpu/drm/radeon/ni_dpm.c

2660

smc_state->levels[i].displayWatermark = (i < 2) ?

drivers/gpu/drm/radeon/ni_dpm.c

2664

smc_state->levels[i].ACIndex = NISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i;

drivers/gpu/drm/radeon/ni_dpm.c

2666

smc_state->levels[i].ACIndex = 0;

drivers/gpu/drm/radeon/ni_dpm.c

2668

smc_state->levelCount++;

drivers/gpu/drm/radeon/ni_dpm.c

2674

ni_populate_smc_sp(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2676

ret = ni_populate_power_containment_values(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2680

ret = ni_populate_sq_ramping_values(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2684

return ni_populate_smc_t(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2693

NISLANDS_SMC_SWSTATE *smc_state;

drivers/gpu/drm/radeon/ni_dpm.c

2694

size_t state_size = struct_size(smc_state, levels,

drivers/gpu/drm/radeon/ni_dpm.c

2698

smc_state = kzalloc(state_size, GFP_KERNEL);

drivers/gpu/drm/radeon/ni_dpm.c

2699

if (smc_state == NULL)

drivers/gpu/drm/radeon/ni_dpm.c

2702

ret = ni_convert_power_state_to_smc(rdev, radeon_new_state, smc_state);

drivers/gpu/drm/radeon/ni_dpm.c

2706

ret = rv770_copy_bytes_to_smc(rdev, address, (u8 *)smc_state, state_size, pi->sram_end);

drivers/gpu/drm/radeon/ni_dpm.c

2709

kfree(smc_state);

drivers/gpu/drm/radeon/rv770_dpm.c

259

RV770_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/rv770_dpm.c

291

smc_state->levels[i].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/rv770_dpm.c

297

smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT =

drivers/gpu/drm/radeon/rv770_dpm.c

305

RV770_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/rv770_dpm.c

311

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

drivers/gpu/drm/radeon/rv770_dpm.c

313

smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP =

drivers/gpu/drm/radeon/rv770_dpm.c

677

RV770_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/rv770_dpm.c

683

smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;

drivers/gpu/drm/radeon/rv770_dpm.c

687

&smc_state->levels[0],

drivers/gpu/drm/radeon/rv770_dpm.c

694

&smc_state->levels[1],

drivers/gpu/drm/radeon/rv770_dpm.c

701

&smc_state->levels[2],

drivers/gpu/drm/radeon/rv770_dpm.c

706

smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;

drivers/gpu/drm/radeon/rv770_dpm.c

707

smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2;

drivers/gpu/drm/radeon/rv770_dpm.c

708

smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3;

drivers/gpu/drm/radeon/rv770_dpm.c

710

smc_state->levels[0].seqValue = rv770_get_seq_value(rdev,

drivers/gpu/drm/radeon/rv770_dpm.c

712

smc_state->levels[1].seqValue = rv770_get_seq_value(rdev,

drivers/gpu/drm/radeon/rv770_dpm.c

714

smc_state->levels[2].seqValue = rv770_get_seq_value(rdev,

drivers/gpu/drm/radeon/rv770_dpm.c

717

rv770_populate_smc_sp(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/rv770_dpm.c

719

return rv770_populate_smc_t(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/rv770_dpm.h

231

RV770_SMC_SWSTATE *smc_state);

drivers/gpu/drm/radeon/rv770_dpm.h

234

RV770_SMC_SWSTATE *smc_state);

drivers/gpu/drm/radeon/si_dpm.c

2224

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/si_dpm.c

2247

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/radeon/si_dpm.c

2252

smc_state->levels[0].dpm2.MaxPS = 0;

drivers/gpu/drm/radeon/si_dpm.c

2253

smc_state->levels[0].dpm2.NearTDPDec = 0;

drivers/gpu/drm/radeon/si_dpm.c

2254

smc_state->levels[0].dpm2.AboveSafeInc = 0;

drivers/gpu/drm/radeon/si_dpm.c

2255

smc_state->levels[0].dpm2.BelowSafeInc = 0;

drivers/gpu/drm/radeon/si_dpm.c

2256

smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0;

drivers/gpu/drm/radeon/si_dpm.c

2306

smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk);

drivers/gpu/drm/radeon/si_dpm.c

2307

smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC;

drivers/gpu/drm/radeon/si_dpm.c

2308

smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC;

drivers/gpu/drm/radeon/si_dpm.c

2309

smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC;

drivers/gpu/drm/radeon/si_dpm.c

2310

smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio);

drivers/gpu/drm/radeon/si_dpm.c

2318

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/si_dpm.c

2329

if (smc_state->levelCount != state->performance_level_count)

drivers/gpu/drm/radeon/si_dpm.c

2366

smc_state->levels[i].SQPowerThrottle = cpu_to_be32(sq_power_throttle);

drivers/gpu/drm/radeon/si_dpm.c

2367

smc_state->levels[i].SQPowerThrottle_2 = cpu_to_be32(sq_power_throttle2);

drivers/gpu/drm/radeon/si_dpm.c

4908

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/si_dpm.c

4915

smc_state->levels[i].bSP = cpu_to_be32(pi->dsp);

drivers/gpu/drm/radeon/si_dpm.c

4917

smc_state->levels[ps->performance_level_count - 1].bSP =

drivers/gpu/drm/radeon/si_dpm.c

5032

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/si_dpm.c

5046

smc_state->levels[0].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/si_dpm.c

5050

smc_state->levels[0].aT = cpu_to_be32(0);

drivers/gpu/drm/radeon/si_dpm.c

5066

a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK;

drivers/gpu/drm/radeon/si_dpm.c

5068

smc_state->levels[i].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/si_dpm.c

5073

smc_state->levels[i + 1].aT = cpu_to_be32(a_t);

drivers/gpu/drm/radeon/si_dpm.c

5135

SISLANDS_SMC_SWSTATE *smc_state)

drivers/gpu/drm/radeon/si_dpm.c

5153

smc_state->flags |= PPSMC_SWSTATE_FLAG_UVD;

drivers/gpu/drm/radeon/si_dpm.c

5159

smc_state->flags |= PPSMC_SWSTATE_FLAG_DC;

drivers/gpu/drm/radeon/si_dpm.c

5161

smc_state->levelCount = 0;

drivers/gpu/drm/radeon/si_dpm.c

5166

smc_state->levels[i].stateFlags |= PPSMC_STATEFLAG_DEEPSLEEP_BYPASS;

drivers/gpu/drm/radeon/si_dpm.c

5168

smc_state->levels[i].stateFlags |= PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE;

drivers/gpu/drm/radeon/si_dpm.c

5173

&smc_state->levels[i]);

drivers/gpu/drm/radeon/si_dpm.c

5174

smc_state->levels[i].arbRefreshState =

drivers/gpu/drm/radeon/si_dpm.c

5181

smc_state->levels[i].displayWatermark =

drivers/gpu/drm/radeon/si_dpm.c

5185

smc_state->levels[i].displayWatermark = (i < 2) ?

drivers/gpu/drm/radeon/si_dpm.c

5189

smc_state->levels[i].ACIndex = SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i;

drivers/gpu/drm/radeon/si_dpm.c

5191

smc_state->levels[i].ACIndex = 0;

drivers/gpu/drm/radeon/si_dpm.c

5193

smc_state->levelCount++;

drivers/gpu/drm/radeon/si_dpm.c

5200

si_populate_smc_sp(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5202

ret = si_populate_power_containment_values(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5206

ret = si_populate_sq_ramping_values(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5210

return si_populate_smc_t(rdev, radeon_state, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5221

SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState;

drivers/gpu/drm/radeon/si_dpm.c

5222

size_t state_size = struct_size(smc_state, levels,

drivers/gpu/drm/radeon/si_dpm.c

5225

memset(smc_state, 0, state_size);

drivers/gpu/drm/radeon/si_dpm.c

5227

ret = si_convert_power_state_to_smc(rdev, radeon_new_state, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5231

ret = si_copy_bytes_to_smc(rdev, address, (u8 *)smc_state,

drivers/gpu/drm/radeon/si_dpm.c

5246

struct SISLANDS_SMC_SWSTATE_SINGLE *smc_state = &si_pi->smc_statetable.ULVState;

drivers/gpu/drm/radeon/si_dpm.c

5249

memset(smc_state, 0, state_size);

drivers/gpu/drm/radeon/si_dpm.c

5251

ret = si_populate_ulv_state(rdev, smc_state);

drivers/gpu/drm/radeon/si_dpm.c

5253

ret = si_copy_bytes_to_smc(rdev, address, (u8 *)smc_state,