arch/mips/alchemy/common/setup.c

71

set_io_port_base(0);

arch/mips/ath79/setup.c

215

set_io_port_base(KSEG1);

arch/mips/bcm63xx/setup.c

163

set_io_port_base(0);

arch/mips/bmips/setup.c

186

set_io_port_base(0);

arch/mips/cavium-octeon/setup.c

1242

set_io_port_base((unsigned long)octeon_dummy_iospace);

arch/mips/cobalt/setup.c

81

set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));

arch/mips/econet/init.c

43

set_io_port_base(KSEG1);

arch/mips/jazz/setup.c

63

set_io_port_base(JAZZ_PORT_BASE);

arch/mips/lantiq/prom.c

76

set_io_port_base((unsigned long) KSEG1);

arch/mips/loongson2ef/common/init.c

40

set_io_port_base((unsigned long)

arch/mips/loongson64/init.c

132

set_io_port_base((unsigned long)PCI_IOBASE);

arch/mips/mti-malta/malta-init.c

194

set_io_port_base(MALTA_GT_PORT_BASE);

arch/mips/mti-malta/malta-init.c

221

set_io_port_base(MALTA_BONITO_PORT_BASE);

arch/mips/mti-malta/malta-init.c

273

set_io_port_base(MALTA_MSC_PORT_BASE);

arch/mips/pci/pci-alchemy.c

473

set_io_port_base((unsigned long)ctx->alchemy_pci_ctrl.io_map_base);

arch/mips/pci/pci-bcm1480.c

243

set_io_port_base(bcm1480_controller.io_map_base);

arch/mips/pci/pci-generic.c

63

set_io_port_base(vaddr);

arch/mips/pci/pci-octeon.c

588

set_io_port_base(OCTEON_PCI_IOSPACE_BASE);

arch/mips/pci/pci-rt2880.c

197

set_io_port_base((unsigned long) io_map_base);

arch/mips/pci/pci-sb1250.c

246

set_io_port_base((unsigned long)io_map_base);

arch/mips/pci/pcie-octeon.c

1893

set_io_port_base(CVMX_ADD_IO_SEG(cvmx_pcie_get_io_base_address(0)));

arch/mips/ralink/of.c

91

set_io_port_base(KSEG1);

arch/mips/rb532/setup.c

50

set_io_port_base(KSEG1);

arch/mips/sgi-ip22/ip22-setup.c

53

set_io_port_base((unsigned long)ioremap(0x00080000,

arch/mips/sgi-ip27/ip27-init.c

134

set_io_port_base(IO_BASE);

arch/mips/sgi-ip30/ip30-setup.c

138

set_io_port_base(IO_BASE);

arch/mips/sgi-ip32/crime.c

33

set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));

arch/mips/sni/setup.c

117

set_io_port_base(SNI_PORT_BASE);

arch/mips/txx9/generic/pci.c

197

set_io_port_base(IO_BASE + pcic->mem_resource[1].start);

arch/mips/txx9/rbtx4927/setup.c

224

set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);

drivers/bcma/driver_pci_host.c

521

set_io_port_base(pc_host->pci_controller.io_map_base);

drivers/ssb/driver_pcicore.c

389

set_io_port_base(ssb_pcicore_controller.io_map_base);