drivers/infiniband/core/uverbs_std_types_qp.c

248

set_caps(&attr, &cap, true);

drivers/infiniband/core/uverbs_std_types_qp.c

267

set_caps(&attr, &cap, false);

drivers/net/ethernet/mellanox/mlx5/core/main.c

392

return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ATOMIC);

drivers/net/ethernet/mellanox/mlx5/core/main.c

450

err = set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ODP);

drivers/net/ethernet/mellanox/mlx5/core/main.c

523

return do_set ? set_caps(dev, set_ctx, MLX5_CAP_GENERAL_2) : 0;

drivers/net/ethernet/mellanox/mlx5/core/main.c

627

return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);

drivers/net/ethernet/mellanox/mlx5/core/main.c

674

err = set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ROCE);

drivers/net/ethernet/mellanox/mlx5/core/main.c

700

err = set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_PORT_SELECTION);

drivers/net/ethernet/qlogic/qede/qede_ethtool.c

1240

u8 set_caps = 0, clr_caps = 0;

drivers/net/ethernet/qlogic/qede/qede_ethtool.c

1261

set_caps = QED_RSS_IPV4_UDP;

drivers/net/ethernet/qlogic/qede/qede_ethtool.c

1276

set_caps = QED_RSS_IPV6_UDP;

drivers/net/ethernet/qlogic/qede/qede_ethtool.c

1316

if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))

drivers/net/ethernet/qlogic/qede/qede_ethtool.c

1320

edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);

include/acpi/actbl2.h

3229

u8 set_caps[16];