drivers/gpu/drm/i915/display/intel_cursor.c

623

const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;

drivers/gpu/drm/i915/display/intel_display_types.h

925

struct skl_pipe_wm raw;

drivers/gpu/drm/i915/display/intel_display_types.h

927

struct skl_pipe_wm optimal;

drivers/gpu/drm/i915/display/skl_universal_plane.c

828

const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;

drivers/gpu/drm/i915/display/skl_watermark.c

1316

skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,

drivers/gpu/drm/i915/display/skl_watermark.c

1329

skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm,

drivers/gpu/drm/i915/display/skl_watermark.c

2699

const struct skl_pipe_wm *old_pipe_wm, *new_pipe_wm;

drivers/gpu/drm/i915/display/skl_watermark.c

2736

const struct skl_pipe_wm *old_pipe_wm,

drivers/gpu/drm/i915/display/skl_watermark.c

2737

const struct skl_pipe_wm *new_pipe_wm)

drivers/gpu/drm/i915/display/skl_watermark.c

2933

struct skl_pipe_wm *pipe_wm = &new_crtc_state->wm.skl.optimal;

drivers/gpu/drm/i915/display/skl_watermark.c

2978

struct skl_pipe_wm *out)

drivers/gpu/drm/i915/display/skl_watermark.c

3885

struct skl_pipe_wm wm;

drivers/gpu/drm/i915/display/skl_watermark.c

3887

const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;

drivers/gpu/drm/i915/display/skl_watermark.h

20

struct skl_pipe_wm;

drivers/gpu/drm/i915/display/skl_watermark.h

53

const struct skl_wm_level *skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,

drivers/gpu/drm/i915/display/skl_watermark.h

56

const struct skl_wm_level *skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm,