drivers/gpu/drm/i915/display/intel_display_debugfs.c

677

skl_ddb_entry_size(entry));

drivers/gpu/drm/i915/display/intel_display_debugfs.c

682

entry->end, skl_ddb_entry_size(entry));

drivers/gpu/drm/i915/display/skl_watermark.c

1355

if (wm->min_ddb_alloc > skl_ddb_entry_size(ddb))

drivers/gpu/drm/i915/display/skl_watermark.c

1363

if (wm->min_ddb_alloc > skl_ddb_entry_size(ddb_y) ||

drivers/gpu/drm/i915/display/skl_watermark.c

1364

uv_wm->min_ddb_alloc > skl_ddb_entry_size(ddb)) {

drivers/gpu/drm/i915/display/skl_watermark.c

1449

iter.size = skl_ddb_entry_size(alloc);

drivers/gpu/drm/i915/display/skl_watermark.c

1475

if (wm->wm[level].min_ddb_alloc > skl_ddb_entry_size(ddb)) {

drivers/gpu/drm/i915/display/skl_watermark.c

1592

WARN_ON(skl_ddb_entry_size(ddb_y));

drivers/gpu/drm/i915/display/skl_watermark.c

2717

skl_ddb_entry_size(old), skl_ddb_entry_size(new));

drivers/gpu/drm/i915/display/skl_watermark.c

453

if (!skl_ddb_entry_size(entry))

drivers/gpu/drm/i915/display/skl_watermark.c

552

ddb_range_size = skl_ddb_entry_size(&ddb_slices);