skge_write32
skge_write32(hw, B2_BSC_INI, (SK_BLK_DUR * SK_FACT_53) / 100);
skge_write32(hw, B2_GP_IO, r);
skge_write32(hw, B2_GP_IO, reg);
skge_write32(hw, B2_GP_IO, reg);
skge_write32(hw, SK_REG(port, GPHY_CTRL),
skge_write32(hw, SK_REG(port, GPHY_CTRL),
skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
skge_write32(hw, B2_FAR, reg);
skge_write32(hw, B2_GP_IO, reg);
skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
skge_write32(hw, B2_GP_IO, reg);
skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET);
skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR);
skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
skge_write32(hw, RB_ADDR(q, RB_START), start);
skge_write32(hw, RB_ADDR(q, RB_WP), start);
skge_write32(hw, RB_ADDR(q, RB_RP), start);
skge_write32(hw, RB_ADDR(q, RB_END), end);
skge_write32(hw, RB_ADDR(q, RB_RX_UTPP),
skge_write32(hw, RB_ADDR(q, RB_RX_LTPP),
skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET);
skge_write32(hw, Q_ADDR(q, Q_F), watermark);
skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32));
skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base);
skge_write32(hw, B0_IMSK, hw->intr_mask);
skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),
skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);
skge_write32(hw, B0_IMSK, (hw->ports == 1) ? 0 : hw->intr_mask);
skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET);
skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
skge_write32(hw, B0_IMSK, hw->intr_mask);
skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);
skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P);
skge_write32(hw, B0_IMSK, hw->intr_mask);
skge_write32(hw, B0_IMSK, hw->intr_mask);
skge_write32(hw, B0_HWE_IMSK, IS_ERR_MSK);
skge_write32(hw, B2_IRQM_MSK, IS_XA1_F|IS_XA2_F);
skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));
skge_write32(hw, B2_IRQM_CTRL, TIM_START);
skge_write32(hw, B0_IMSK, 0);
skge_write32(hw, B0_IMSK, 0);
skge_write32(hw, B0_IMSK, 0);
skge_write32(hw, B2_IRQM_MSK, msk);
skge_write32(hw, B2_IRQM_CTRL, TIM_STOP);
skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, delay));
skge_write32(hw, B2_IRQM_CTRL, TIM_START);
skge_write32(hw, SK_REG(port, TX_LED_VAL), 0);
skge_write32(hw, SK_REG(port, RX_LED_VAL), 0);
skge_write32(hw, SK_REG(port, RX_LED_VAL), 100);
skge_write32(hw, SK_REG(port, TX_LED_VAL), 100);