size_mask
static int atomic_size_to_mode(int size_mask)
int supported_size_mask = size_mask & 0x1ff;
*remainder = (u32)dividend & erase->size_mask;
erase->size_mask = (1 << erase->size_shift) - 1;
u32 size_mask;
if (region->size & erase[i].size_mask) {
ring->size_mask = size - 1;
ring->size_mask = ring->actual_size - 1;
ring->prod & ring->size_mask,
index = cq->mcq.cons_index & ring->size_mask;
index = (cq->mcq.cons_index) & ring->size_mask;
index = ring->prod & ring->size_mask;
ring->cons & ring->size_mask,
wqe_index = be16_to_cpu(err_cqe->wqe_index) & ring->size_mask;
u32 size_mask = ring->size_mask;
index = cons_index & size_mask;
ring_index = ring_cons & size_mask;
new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
ring_index = (ring_index + last_nr_txbb) & size_mask;
index = cons_index & size_mask;
ring->size_mask = size - 1;
index = ring->prod & ring->size_mask;
u32 size_mask;
u32 size_mask;
for (i = 0; i <= ring->size_mask; i++)
for (i = 0; i <= ring->size_mask; i++) {
for (i = 0; i < (ring->size_mask + 1) * FBNIC_BD_FRAG_COUNT; i++) {
for (i = 0; i <= ring->size_mask; i++)
ring->size_mask, ring->size, ring->flags);
return (ring->head - ring->tail - 1) & ring->size_mask;
tail &= ring->size_mask;
return (ring->tail - ring->head) & ring->size_mask;
done = (head & (rcq->size_mask + 1)) ? cpu_to_le64(FBNIC_RCD_DONE) : 0;
raw_rcd = &rcq->desc[head & rcq->size_mask];
if (!(head & rcq->size_mask)) {
writel(head & rcq->size_mask, rcq->doorbell);
ring->size_mask = 0;
txr->size_mask = fbn->txq_size - 1;
size_t size = array_size(sizeof(*txr->tx_buf), txr->size_mask + 1);
rxr->size_mask = rxq_size - 1;
size_t size = array_size(sizeof(*rxr->rx_buf), rxr->size_mask + 1);
size = sizeof(*rxr->rx_buf) * (rxr->size_mask + 1);
u32 log_size = fls(twq->size_mask);
if (!twq->size_mask)
u32 log_size = fls(twq->size_mask);
if (!twq->size_mask)
u32 log_size = fls(tcq->size_mask);
if (!tcq->size_mask)
fbnic_ring_wr32(tcq, FBNIC_QUEUE_TIM_THRESHOLD, tcq->size_mask / 2);
log_size = fls(hpq->size_mask) + ilog2(FBNIC_BD_FRAG_COUNT);
if (!ppq->size_mask)
log_size = fls(ppq->size_mask) + ilog2(FBNIC_BD_FRAG_COUNT);
threshold = rx_desc ? : rcq->size_mask / 2;
u32 log_size = fls(rcq->size_mask);
tail &= ring->size_mask;
tail &= ring->size_mask;
FBNIC_XMIT_CB(skb)->desc_count = ((twd - meta) + 1) & ring->size_mask;
tail &= ring->size_mask;
clean_desc = (hw_head - head) & ring->size_mask;
head &= ring->size_mask;
head &= ring->size_mask;
head &= ring->size_mask;
head &= ring->size_mask;
head &= ring->size_mask;
done = (head & (cmpl->size_mask + 1)) ? 0 : cpu_to_le64(FBNIC_TCD_DONE);
raw_tcd = &cmpl->desc[head & cmpl->size_mask];
if (!(head & cmpl->size_mask)) {
writel(head & cmpl->size_mask, cmpl->doorbell);
head &= ring->size_mask;
i &= bdq->size_mask;
u16 size_mask; /* Size of ring in descriptors - 1 */
f->m.rptr &= f->m.size_mask;
f->size_mask = memsz - 1;
u16 size_mask;
f->size_mask = memsz - 1;
f->m.rptr &= f->m.size_mask;
u16 size_mask;
unsigned int size_mask;
idx &= htt->rx_ring.size_mask;
idx &= htt->rx_ring.size_mask;
idx &= htt->rx_ring.size_mask;
htt->rx_ring.size_mask = htt->rx_ring.size - 1;
htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
u32 size_mask;
size_mask = data;
while (size_mask) {
if (size_mask & 1)
size_mask >>= 1;
size_t size_cpus, size_mask;
size_mask = sizeof(u16) + sizeof(struct perf_record_mask_cpu_map32) +
if (syn_data->has_any_cpu || size_cpus < size_mask) {
syn_data->size = header_size + PERF_ALIGN(size_mask, sizeof(u64));
#define dde_count_mask size_mask(8)
#define csb_v_mask size_mask(1)
#define csb_f_mask size_mask(1)
#define csb_cs_mask size_mask(8)
#define csb_cc_mask size_mask(8)
#define csb_ce_mask size_mask(8)
#define ccb_cm_mask size_mask(3)
#define vas_buf_num_mask size_mask(6)
#define send_wc_id_mask size_mask(16)
#define recv_wc_id_mask size_mask(16)
#define vas_invalid_mask size_mask(1)
#define nxsf_t_mask size_mask(1)
#define nxsf_fs_mask size_mask(8)
#define in_histlen_mask size_mask(12)
#define in_dhtlen_mask size_mask(12)
#define in_subc_mask size_mask(3)
#define in_sfbt_mask size_mask(4)
#define in_rembytecnt_mask size_mask(16)
#define out_tebc_mask size_mask(3)
#define out_subc_mask size_mask(16)
#define out_sfbt_mask size_mask(4)
#define out_rembytecnt_mask size_mask(16)
#define out_dhtlen_mask size_mask(12)
#define gzip_fc_mask size_mask(8)
#define crb_c_mask size_mask(1)
#define crb_at_mask size_mask(1)
#define EFT_FC_MASK size_mask(3)