drivers/gpu/drm/bridge/sil-sii8620.c

1019

sii8620_setbits(ctx, REG_M3_P0CTRL,

drivers/gpu/drm/bridge/sil-sii8620.c

1204

sii8620_setbits(ctx, REG_M3_P0CTRL,

drivers/gpu/drm/bridge/sil-sii8620.c

1207

sii8620_setbits(ctx, REG_M3_POSTM, MSK_M3_POSTM_RRP_DECODE,

drivers/gpu/drm/bridge/sil-sii8620.c

1223

sii8620_setbits(ctx, REG_EDID_CTRL, BIT_EDID_CTRL_EDID_PRIME_VALID, 0);

drivers/gpu/drm/bridge/sil-sii8620.c

1232

sii8620_setbits(ctx, REG_TMDS_CSTAT_P3,

drivers/gpu/drm/bridge/sil-sii8620.c

1361

sii8620_setbits(ctx, REG_LM_DDC, BIT_LM_DDC_SW_TPI_EN_DISABLED, 0);

drivers/gpu/drm/bridge/sil-sii8620.c

1405

sii8620_setbits(ctx, REG_GENCTL, BIT_GENCTL_EMSC_EN

drivers/gpu/drm/bridge/sil-sii8620.c

1408

sii8620_setbits(ctx, REG_GENCTL, BIT_GENCTL_CLR_EMSC_RFIFO

drivers/gpu/drm/bridge/sil-sii8620.c

1410

sii8620_setbits(ctx, REG_COMMECNT, BIT_COMMECNT_I2C_TO_EMSC_EN, ~0);

drivers/gpu/drm/bridge/sil-sii8620.c

875

sii8620_setbits(ctx, REG_DPD, BIT_DPD_PDNRX12 | BIT_DPD_PDIDCK_N

drivers/gpu/drm/bridge/sil-sii8620.c

885

sii8620_setbits(ctx, REG_RX_HDMI_CLR_BUFFER,