Symbol: sdr_set_field
drivers/mmc/host/mtk-sd.c
1086
sdr_set_field(host->base + MSDC_CFG,
drivers/mmc/host/mtk-sd.c
1090
sdr_set_field(host->base + MSDC_CFG,
drivers/mmc/host/mtk-sd.c
1136
sdr_set_field(host->base + tune_reg,
drivers/mmc/host/mtk-sd.c
1242
sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);
drivers/mmc/host/mtk-sd.c
1601
sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,
drivers/mmc/host/mtk-sd.c
1910
sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,
drivers/mmc/host/mtk-sd.c
1928
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
drivers/mmc/host/mtk-sd.c
2071
sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);
drivers/mmc/host/mtk-sd.c
2260
sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, value);
drivers/mmc/host/mtk-sd.c
2261
sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST,
drivers/mmc/host/mtk-sd.c
2264
sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,
drivers/mmc/host/mtk-sd.c
2266
sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST,
drivers/mmc/host/mtk-sd.c
2291
sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, value);
drivers/mmc/host/mtk-sd.c
2292
sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST,
drivers/mmc/host/mtk-sd.c
2295
sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,
drivers/mmc/host/mtk-sd.c
2297
sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST,
drivers/mmc/host/mtk-sd.c
2308
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_PATCH_BIT_RD_DAT_SEL, value);
drivers/mmc/host/mtk-sd.c
2309
sdr_set_field(host->base + MSDC_PATCH_BIT2, MSDC_PB2_CFGCRCSTSEDGE, value);
drivers/mmc/host/mtk-sd.c
2311
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DSPL, value);
drivers/mmc/host/mtk-sd.c
2312
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL, value);
drivers/mmc/host/mtk-sd.c
2330
sdr_set_field(host->base + tune_reg,
drivers/mmc/host/mtk-sd.c
2395
sdr_set_field(host->base + tune_reg,
drivers/mmc/host/mtk-sd.c
2403
sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,
drivers/mmc/host/mtk-sd.c
2421
sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);
drivers/mmc/host/mtk-sd.c
2425
sdr_set_field(host->base + MSDC_PAD_TUNE,
drivers/mmc/host/mtk-sd.c
2435
sdr_set_field(host->base + PAD_CMD_TUNE,
drivers/mmc/host/mtk-sd.c
2453
sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,
drivers/mmc/host/mtk-sd.c
2469
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
drivers/mmc/host/mtk-sd.c
2520
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
drivers/mmc/host/mtk-sd.c
2618
sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2625
sdr_set_field(host->base + PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2633
sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);
drivers/mmc/host/mtk-sd.c
2659
sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2662
sdr_set_field(host->base + PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2678
sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2681
sdr_set_field(host->base + PAD_DS_TUNE,
drivers/mmc/host/mtk-sd.c
2742
sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1);
drivers/mmc/host/mtk-sd.c
2743
sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1);
drivers/mmc/host/mtk-sd.c
2744
sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1);
drivers/mmc/host/mtk-sd.c
2750
sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0);
drivers/mmc/host/mtk-sd.c
2751
sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0);
drivers/mmc/host/mtk-sd.c
2752
sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0);
drivers/mmc/host/mtk-sd.c
2756
sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4);
drivers/mmc/host/mtk-sd.c
2831
sdr_set_field(host->base + MSDC_DMA_CTRL,
drivers/mmc/host/mtk-sd.c
857
sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);
drivers/mmc/host/mtk-sd.c
863
sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,
drivers/mmc/host/mtk-sd.c
932
sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,
drivers/mmc/host/mtk-sd.c
941
sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,