sign_extend
#define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
#define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
#define FIELD_s21(word) sign_extend(((BITS(word, 6, 15) << 11) | \
#define FIELD_s25(word) sign_extend(((BITS(word, 0, 3) << 21) | \
#define FIELD_S_s7(word) sign_extend(BITS((word), 0, 5) << 1, 9)
#define FIELD_S_s8(word) sign_extend(BITS((word), 0, 7) << 1, 9)
#define FIELD_S_s9(word) sign_extend(BITS((word), 0, 8), 9)
#define FIELD_S_s10(word) sign_extend(BITS((word), 0, 8) << 1, 10)
#define FIELD_S_s11(word) sign_extend(BITS((word), 0, 8) << 2, 11)
#define FIELD_S_s13(word) sign_extend(BITS((word), 0, 10) << 2, 13)
#define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
bool sign_extend;
sign_extend = (BPF_MODE(insn->code) == BPF_MEMSX ||
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
sign_extend = BPF_MODE(code) == BPF_MEMSX ||
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
if (sign_extend)
sign_extend(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0],
bool func_addr_fixed, sign_extend;
int is_default_endian, int sign_extend)
vcpu->arch.mmio_sign_extend = sign_extend;
if (sign_extend(image, ctx, src_reg, dst_reg, off / 8))
if (sign_extend(image, ctx, reg, reg, size))
ret = sign_extend(RV_REG_A0, regmap[BPF_REG_0], m->ret_size,
if (sign_extend(jit, BPF_REG_1 + j,
if (sign_extend(jit, REG_2, m->ret_size, m->ret_flags))
sign_extend(count, dst);
sign_extend(count, dst);
sign_extend(2, dst);
sign_extend(2, dst);
.sign_extend = true,
.sign_extend = true,
if (data->sign_extend)
bool sign_extend;