drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

1855

static int si_write_smc_soft_register(struct amdgpu_device *adev,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2829

ret = si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_ticks_per_us, ticks_per_us);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3883

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4161

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mvdd_chg_time, 1);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4177

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_delay_vreg, vddc_dly);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4178

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_delay_acpi, acpi_dly);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4179

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mclk_chg_timeout, vbi_dly);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4180

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mc_block_delay, 0xAA);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4564

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4566

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4568

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_plat_type,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4607

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5211

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_ulv_volt_change_delay,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5277

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_vr_hot_gpio,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5311

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5783

si_write_smc_soft_register(adev,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5865

si_write_smc_soft_register(adev,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5869

si_write_smc_soft_register(adev,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5873

si_write_smc_soft_register(adev,

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6179

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_seq_index, 1);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6449

si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);

drivers/gpu/drm/radeon/si_dpm.c

1687

static int si_write_smc_soft_register(struct radeon_device *rdev,

drivers/gpu/drm/radeon/si_dpm.c

2659

ret = si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_ticks_per_us, ticks_per_us);

drivers/gpu/drm/radeon/si_dpm.c

3313

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true);

drivers/gpu/drm/radeon/si_dpm.c

3590

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mvdd_chg_time, 1);

drivers/gpu/drm/radeon/si_dpm.c

3606

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_delay_vreg, vddc_dly);

drivers/gpu/drm/radeon/si_dpm.c

3607

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_delay_acpi, acpi_dly);

drivers/gpu/drm/radeon/si_dpm.c

3608

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mclk_chg_timeout, vbi_dly);

drivers/gpu/drm/radeon/si_dpm.c

3609

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mc_block_delay, 0xAA);

drivers/gpu/drm/radeon/si_dpm.c

3999

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc,

drivers/gpu/drm/radeon/si_dpm.c

4001

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd,

drivers/gpu/drm/radeon/si_dpm.c

4003

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_plat_type,

drivers/gpu/drm/radeon/si_dpm.c

4042

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,

drivers/gpu/drm/radeon/si_dpm.c

4615

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_ulv_volt_change_delay,

drivers/gpu/drm/radeon/si_dpm.c

4682

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_vr_hot_gpio,

drivers/gpu/drm/radeon/si_dpm.c

4716

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);

drivers/gpu/drm/radeon/si_dpm.c

5196

si_write_smc_soft_register(rdev,

drivers/gpu/drm/radeon/si_dpm.c

5281

if (si_write_smc_soft_register(rdev,

drivers/gpu/drm/radeon/si_dpm.c

5286

if (si_write_smc_soft_register(rdev,

drivers/gpu/drm/radeon/si_dpm.c

5291

if (si_write_smc_soft_register(rdev,

drivers/gpu/drm/radeon/si_dpm.c

5604

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_seq_index, 1);

drivers/gpu/drm/radeon/si_dpm.c

5870

si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);