CS2CDR_LDB_DI0_CLK_SEL_SHIFT
sel[0][0] = (reg >> CS2CDR_LDB_DI0_CLK_SEL_SHIFT) & 7;
reg &= ~((7 << CS2CDR_LDB_DI0_CLK_SEL_SHIFT) |
reg |= ((sel[0][i] << CS2CDR_LDB_DI0_CLK_SEL_SHIFT) |