arch/x86/boot/compressed/idt_64.c

71

if (sev_status & BIT(1))

arch/x86/boot/compressed/misc.c

386

if (sev_status & MSR_AMD64_SEV_ES_ENABLED)

arch/x86/boot/compressed/sev.c

227

unsupported = snp_get_unsupported_features(sev_status);

arch/x86/boot/compressed/sev.c

403

sev_status = m.q;

arch/x86/boot/compressed/sev.c

404

if (!(sev_status & MSR_AMD64_SEV_ENABLED))

arch/x86/boot/compressed/sev.c

408

if (sev_status & MSR_AMD64_SEV_ES_ENABLED) {

arch/x86/boot/compressed/sev.c

417

if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) {

arch/x86/boot/compressed/sev.c

432

if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED))

arch/x86/boot/compressed/sev.c

48

return sev_status & MSR_AMD64_SEV_SNP_ENABLED;

arch/x86/boot/startup/sev-startup.c

107

if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED))

arch/x86/boot/startup/sev-startup.c

82

if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED))

arch/x86/boot/startup/sme.c

301

if (!sme_get_me_mask() || sev_status & MSR_AMD64_SEV_ENABLED)

arch/x86/boot/startup/sme.c

528

sev_status = msr = native_rdmsrq(MSR_AMD64_SEV);

arch/x86/coco/core.c

102

return sev_status & MSR_AMD64_SNP_SECURE_TSC;

arch/x86/coco/core.c

108

return sev_status & MSR_AMD64_SNP_SECURE_AVIC;

arch/x86/coco/core.c

142

if (sev_status & MSR_AMD64_SNP_VTOM)

arch/x86/coco/core.c

158

if (sev_status & MSR_AMD64_SNP_VTOM)

arch/x86/coco/core.c

74

if (sev_status & MSR_AMD64_SNP_VTOM)

arch/x86/coco/core.c

82

return sme_me_mask && !(sev_status & MSR_AMD64_SEV_ENABLED);

arch/x86/coco/core.c

85

return sev_status & MSR_AMD64_SEV_ENABLED;

arch/x86/coco/core.c

88

return sev_status & MSR_AMD64_SEV_ES_ENABLED;

arch/x86/coco/core.c

95

return (sev_status & MSR_AMD64_SEV_ENABLED) &&

arch/x86/coco/core.c

96

!(sev_status & MSR_AMD64_SEV_ES_ENABLED);

arch/x86/coco/core.c

99

return sev_status & MSR_AMD64_SEV_SNP_ENABLED;

arch/x86/coco/sev/core.c

1421

if (sev_status & BIT_ULL(i)) {

arch/x86/coco/sev/core.c

854

vmsa->sev_features = sev_status >> 2;

arch/x86/coco/sev/vc-handle.c

417

if (sev_status & MSR_AMD64_SNP_SECURE_TSC)

arch/x86/coco/sev/vc-handle.c

667

if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP)

arch/x86/coco/sev/vc-handle.c

707

if (sev_status & MSR_AMD64_SNP_DEBUG_SWAP)

arch/x86/coco/sev/vc-shared.c

592

if (sev_status & MSR_AMD64_SNP_SECURE_TSC)

arch/x86/hyperv/ivm.c

348

vmsa->sev_features = sev_status >> 2;

arch/x86/hyperv/ivm.c

874

sev_status = MSR_AMD64_SNP_VTOM;

arch/x86/include/asm/mem_encrypt.h

32

extern u64 sev_status;

arch/x86/mm/mem_encrypt_amd.c

44

u64 sev_status __section(".data") = 0;

arch/x86/mm/mem_encrypt_amd.c

45

SYM_PIC_ALIAS(sev_status);

arch/x86/mm/mem_encrypt_amd.c

508

if (sev_status & MSR_AMD64_SEV_ES_ENABLED)

arch/x86/mm/mem_encrypt_amd.c

518

if (sev_status & MSR_AMD64_SEV_ENABLED)

arch/x86/mm/mem_encrypt_amd.c

525

if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) {

arch/x86/mm/mem_encrypt_amd.c

539

if (sev_status & MSR_AMD64_SNP_SECURE_TSC)