set_offset
set_offset(sensor);
nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
crtc->cursor.set_offset = nv04_cursor_set_offset;
if (!ret && nv_crtc->cursor.set_offset)
if (nv_crtc->cursor.set_offset)
nv_crtc->cursor.set_offset(nv_crtc,
if (nv_crtc->cursor.set_offset)
void (*set_offset)(struct nouveau_crtc *, uint32_t offset);
return set_offset(regmap, channel - 1, val);
int (*set_offset)(struct mcp3911 *adc, int channel, int val);
return adc->chip->set_offset(adc, channel->channel, val);
.set_offset = mcp3910_set_offset,
.set_offset = mcp3911_set_offset,
.set_offset = mcp3910_set_offset,
.set_offset = mcp3910_set_offset,
.set_offset = mcp3910_set_offset,
.set_offset = mcp3910_set_offset,
.set_offset = mcp3910_set_offset,
.set_offset = mptspi_write_offset,
unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask,
set_offset = (idx / 4) * 4 + eint->regs->dbnc_set;
writel(rst | bit, eint->base[inst] + set_offset);
if (rtc->ops->set_offset)
if (!rtc->ops->set_offset)
ret = rtc->ops->set_offset(rtc->dev.parent, offset);
.set_offset = aml_rtc_set_offset,
.set_offset = armada38x_rtc_set_offset,
.set_offset = at91_rtc_setoffset,
.set_offset = m41txx_rtc_set_offset,
.set_offset = optee_rtc_setoffset,
.set_offset = pcf2123_set_offset,
.set_offset = pcf85063_set_offset,
.set_offset = pcf8523_rtc_set_offset,
.set_offset = rtca3_set_offset,
.set_offset = rs5c372_set_offset,
.set_offset = rv3028_set_offset,
.set_offset = rv3032_set_offset,
.set_offset = rx8025_set_offset,
.set_offset = rzn1_rtc_set_offset,
.set_offset = ti_k3_rtc_set_offset,
.set_offset = tps65910_set_offset,
.set_offset = tps6594_rtc_set_offset,
.set_offset = xlnx_rtc_set_offset,
if (!rtc->ops->set_offset)
.set_offset = NCR_700_set_offset,
.set_offset = ahd_linux_set_offset,
.set_offset = ahc_linux_set_offset,
.set_offset = esp_set_offset,
.set_offset = ncr53c8xx_set_offset,
.set_offset = sym2_set_offset,
set_offset(var, info);
writel(0x1, drvdata->base + drvdata->pdata->set_offset);
u32 set_offset;
.set_offset = 0x8,
.set_offset = 0x4,
writel(0x1, drvdata->base + drvdata->pdata->set_offset);
int (*set_offset)(struct device *, long offset);
void (*set_offset)(struct scsi_target *, int);
if (set_offset(NSEC_PER_SEC - 1, 1))
if (set_offset(-NSEC_PER_SEC + 1, 1))
if (set_offset(-NSEC_PER_SEC - 1, 1))
if (set_offset(5 * NSEC_PER_SEC, 1))
if (set_offset(-5 * NSEC_PER_SEC, 1))
if (set_offset(5 * NSEC_PER_SEC + NSEC_PER_SEC / 2, 1))
if (set_offset(-5 * NSEC_PER_SEC - NSEC_PER_SEC / 2, 1))
if (set_offset(USEC_PER_SEC - 1, 0))
if (set_offset(-USEC_PER_SEC + 1, 0))
if (set_offset(-USEC_PER_SEC - 1, 0))
if (set_offset(5 * USEC_PER_SEC, 0))
if (set_offset(-5 * USEC_PER_SEC, 0))
if (set_offset(5 * USEC_PER_SEC + USEC_PER_SEC / 2, 0))
if (set_offset(-5 * USEC_PER_SEC - USEC_PER_SEC / 2, 0))