drivers/spi/spi-davinci.c

1039

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);

drivers/spi/spi-davinci.c

1040

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK);

drivers/spi/spi-davinci.c

1041

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);

drivers/spi/spi-davinci.c

481

set_io_bits(dspi->base + SPIPC0, 1 << spi_get_chipselect(spi, 0));

drivers/spi/spi-davinci.c

485

set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);

drivers/spi/spi-davinci.c

488

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_LOOPBACK_MASK);

drivers/spi/spi-davinci.c

652

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);

drivers/spi/spi-davinci.c

658

set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);

drivers/spi/spi-davinci.c

720

set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);

drivers/spi/spi-davinci.c

746

set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);