drivers/gpu/drm/amd/display/dc/core/dc.c

499

dc->hwss.set_drr(&pipe,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

702

pipe_ctx->stream_res.tg->funcs->set_drr)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

703

pipe_ctx->stream_res.tg->funcs->set_drr(

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2327

.set_drr =

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1243

.set_drr = dce120_timing_generator_set_drr,

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

231

.set_drr = dce110_timing_generator_set_drr,

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

212

.set_drr = dce110_timing_generator_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3393

.set_drr = set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_init.c

62

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

65

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_init.c

64

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

65

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

66

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

67

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

69

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

71

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

68

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

73

.set_drr = dcn35_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

72

.set_drr = dcn35_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

49

.set_drr = dcn10_set_drr,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1069

void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

411

void (*set_drr)(struct timing_generator *tg, const struct drr_params *params);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1649

.set_drr = optc1_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

537

.set_drr = optc1_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

162

.set_drr = optc1_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

390

.set_drr = optc1_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

142

.set_drr = optc301_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

479

.set_drr = optc31_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

227

.set_drr = optc31_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

332

.set_drr = optc32_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

574

.set_drr = optc35_set_drr,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

499

.set_drr = optc401_set_drr,