drivers/phy/microchip/sparx5_serdes.c

1200

sdx5_rmw(SD_LANE_25G_SD_LANE_CFG_MACRO_RST_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1205

sdx5_rmw(SD25G_LANE_CMU_FF_REGISTER_TABLE_INDEX_SET(0xFF),

drivers/phy/microchip/sparx5_serdes.c

1210

sdx5_rmw(SD25G_LANE_CMU_1A_R_DWIDTHCTRL_FROM_HWT_SET

drivers/phy/microchip/sparx5_serdes.c

1218

sdx5_rmw(SD25G_LANE_CMU_31_CFG_COMMON_RESERVE_7_0_SET

drivers/phy/microchip/sparx5_serdes.c

1224

sdx5_rmw(SD25G_LANE_CMU_09_CFG_EN_DUMMY_SET(params->cfg_en_dummy),

drivers/phy/microchip/sparx5_serdes.c

1229

sdx5_rmw(SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0_SET

drivers/phy/microchip/sparx5_serdes.c

1235

sdx5_rmw(SD25G_LANE_CMU_40_L0_CFG_TXCAL_EN_SET(params->l0_cfg_txcal_en),

drivers/phy/microchip/sparx5_serdes.c

1240

sdx5_rmw(SD25G_LANE_CMU_46_L0_CFG_TX_RESERVE_15_8_SET

drivers/phy/microchip/sparx5_serdes.c

1246

sdx5_rmw(SD25G_LANE_CMU_45_L0_CFG_TX_RESERVE_7_0_SET

drivers/phy/microchip/sparx5_serdes.c

1252

sdx5_rmw(SD25G_LANE_CMU_0B_CFG_VCO_CAL_RESETN_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1257

sdx5_rmw(SD25G_LANE_CMU_0B_CFG_VCO_CAL_RESETN_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1262

sdx5_rmw(SD25G_LANE_CMU_19_R_CK_RESETB_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1267

sdx5_rmw(SD25G_LANE_CMU_19_R_CK_RESETB_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1272

sdx5_rmw(SD25G_LANE_CMU_18_R_PLL_RSTN_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1277

sdx5_rmw(SD25G_LANE_CMU_18_R_PLL_RSTN_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1282

sdx5_rmw(SD25G_LANE_CMU_1A_R_DWIDTHCTRL_2_0_SET(params->r_d_width_ctrl_2_0),

drivers/phy/microchip/sparx5_serdes.c

1287

sdx5_rmw(SD25G_LANE_CMU_30_R_TXFIFO_CK_DIV_PMAD_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1296

sdx5_rmw(SD25G_LANE_CMU_0C_CFG_PLL_LOL_SET_SET(params->cfg_pll_lol_set) |

drivers/phy/microchip/sparx5_serdes.c

1304

sdx5_rmw(SD25G_LANE_CMU_0D_CFG_PRE_DIVSEL_1_0_SET

drivers/phy/microchip/sparx5_serdes.c

1310

sdx5_rmw(SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0_SET(params->cfg_sel_div_3_0),

drivers/phy/microchip/sparx5_serdes.c

1315

sdx5_rmw(SD25G_LANE_CMU_FF_REGISTER_TABLE_INDEX_SET(0x00),

drivers/phy/microchip/sparx5_serdes.c

1320

sdx5_rmw(SD25G_LANE_LANE_0C_LN_CFG_PMA_TX_CK_BITWIDTH_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1326

sdx5_rmw(SD25G_LANE_LANE_01_LN_CFG_TX_PREDIV_1_0_SET

drivers/phy/microchip/sparx5_serdes.c

1332

sdx5_rmw(SD25G_LANE_LANE_18_LN_CFG_RXDIV_SEL_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1338

sdx5_rmw(SD25G_LANE_LANE_2C_LN_CFG_TX_SUBRATE_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1344

sdx5_rmw(SD25G_LANE_LANE_28_LN_CFG_RX_SUBRATE_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1350

sdx5_rmw(SD25G_LANE_LANE_18_LN_CFG_CDRCK_EN_SET(params->cfg_cdrck_en),

drivers/phy/microchip/sparx5_serdes.c

1355

sdx5_rmw(SD25G_LANE_LANE_0F_LN_CFG_DFETAP_EN_5_1_SET

drivers/phy/microchip/sparx5_serdes.c

1361

sdx5_rmw(SD25G_LANE_LANE_18_LN_CFG_ERRAMP_PD_SET(params->cfg_erramp_pd),

drivers/phy/microchip/sparx5_serdes.c

1366

sdx5_rmw(SD25G_LANE_LANE_1D_LN_CFG_PI_DFE_EN_SET(params->cfg_pi_dfe_en),

drivers/phy/microchip/sparx5_serdes.c

1371

sdx5_rmw(SD25G_LANE_LANE_19_LN_CFG_ECDR_PD_SET(params->cfg_ecdr_pd),

drivers/phy/microchip/sparx5_serdes.c

1376

sdx5_rmw(SD25G_LANE_LANE_01_LN_CFG_ITX_IPDRIVER_BASE_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1382

sdx5_rmw(SD25G_LANE_LANE_03_LN_CFG_TAP_DLY_4_0_SET(params->cfg_tap_dly_4_0),

drivers/phy/microchip/sparx5_serdes.c

1387

sdx5_rmw(SD25G_LANE_LANE_06_LN_CFG_TAP_ADV_3_0_SET(params->cfg_tap_adv_3_0),

drivers/phy/microchip/sparx5_serdes.c

1392

sdx5_rmw(SD25G_LANE_LANE_07_LN_CFG_EN_ADV_SET(params->cfg_en_adv) |

drivers/phy/microchip/sparx5_serdes.c

1399

sdx5_rmw(SD25G_LANE_LANE_43_LN_CFG_TX_RESERVE_15_8_SET

drivers/phy/microchip/sparx5_serdes.c

1405

sdx5_rmw(SD25G_LANE_LANE_42_LN_CFG_TX_RESERVE_7_0_SET

drivers/phy/microchip/sparx5_serdes.c

1411

sdx5_rmw(SD25G_LANE_LANE_05_LN_CFG_BW_1_0_SET(params->cfg_bw_1_0),

drivers/phy/microchip/sparx5_serdes.c

1416

sdx5_rmw(SD25G_LANE_LANE_0B_LN_CFG_TXCAL_MAN_EN_SET

drivers/phy/microchip/sparx5_serdes.c

1422

sdx5_rmw(SD25G_LANE_LANE_0A_LN_CFG_TXCAL_SHIFT_CODE_5_0_SET

drivers/phy/microchip/sparx5_serdes.c

1428

sdx5_rmw(SD25G_LANE_LANE_09_LN_CFG_TXCAL_VALID_SEL_3_0_SET

drivers/phy/microchip/sparx5_serdes.c

1434

sdx5_rmw(SD25G_LANE_LANE_1A_LN_CFG_CDR_KF_2_0_SET(params->cfg_cdr_kf_2_0),

drivers/phy/microchip/sparx5_serdes.c

1439

sdx5_rmw(SD25G_LANE_LANE_1B_LN_CFG_CDR_M_7_0_SET(params->cfg_cdr_m_7_0),

drivers/phy/microchip/sparx5_serdes.c

1444

sdx5_rmw(SD25G_LANE_LANE_2B_LN_CFG_PI_BW_3_0_SET(params->cfg_pi_bw_3_0),

drivers/phy/microchip/sparx5_serdes.c

1449

sdx5_rmw(SD25G_LANE_LANE_2C_LN_CFG_DIS_2NDORDER_SET

drivers/phy/microchip/sparx5_serdes.c

1455

sdx5_rmw(SD25G_LANE_LANE_2E_LN_CFG_CTLE_RSTN_SET(params->cfg_ctle_rstn),

drivers/phy/microchip/sparx5_serdes.c

1460

sdx5_rmw(SD25G_LANE_LANE_00_LN_CFG_ITX_IPCML_BASE_1_0_SET

drivers/phy/microchip/sparx5_serdes.c

1466

sdx5_rmw(SD25G_LANE_LANE_44_LN_CFG_RX_RESERVE_7_0_SET

drivers/phy/microchip/sparx5_serdes.c

1472

sdx5_rmw(SD25G_LANE_LANE_45_LN_CFG_RX_RESERVE_15_8_SET

drivers/phy/microchip/sparx5_serdes.c

1478

sdx5_rmw(SD25G_LANE_LANE_0D_LN_CFG_DFECK_EN_SET(params->cfg_dfeck_en) |

drivers/phy/microchip/sparx5_serdes.c

1485

sdx5_rmw(SD25G_LANE_LANE_21_LN_CFG_VGA_CTRL_BYP_4_0_SET

drivers/phy/microchip/sparx5_serdes.c

1491

sdx5_rmw(SD25G_LANE_LANE_22_LN_CFG_EQR_FORCE_3_0_SET

drivers/phy/microchip/sparx5_serdes.c

1497

sdx5_rmw(SD25G_LANE_LANE_1C_LN_CFG_EQC_FORCE_3_0_SET

drivers/phy/microchip/sparx5_serdes.c

1505

sdx5_rmw(SD25G_LANE_LANE_1E_LN_CFG_SUM_SETCM_EN_SET

drivers/phy/microchip/sparx5_serdes.c

1511

sdx5_rmw(SD25G_LANE_LANE_25_LN_CFG_INIT_POS_ISCAN_6_0_SET

drivers/phy/microchip/sparx5_serdes.c

1517

sdx5_rmw(SD25G_LANE_LANE_26_LN_CFG_INIT_POS_IPI_6_0_SET

drivers/phy/microchip/sparx5_serdes.c

1523

sdx5_rmw(SD25G_LANE_LANE_18_LN_CFG_ERRAMP_PD_SET(params->cfg_erramp_pd),

drivers/phy/microchip/sparx5_serdes.c

1528

sdx5_rmw(SD25G_LANE_LANE_0E_LN_CFG_DFEDIG_M_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1534

sdx5_rmw(SD25G_LANE_LANE_0E_LN_CFG_EN_DFEDIG_SET(params->cfg_en_dfedig),

drivers/phy/microchip/sparx5_serdes.c

1539

sdx5_rmw(SD25G_LANE_LANE_40_LN_R_TX_POL_INV_SET(params->r_tx_pol_inv) |

drivers/phy/microchip/sparx5_serdes.c

1546

sdx5_rmw(SD25G_LANE_LANE_04_LN_CFG_RX2TX_LP_EN_SET(params->cfg_rx2tx_lp_en) |

drivers/phy/microchip/sparx5_serdes.c

1553

sdx5_rmw(SD25G_LANE_LANE_1E_LN_CFG_RXLB_EN_SET(params->cfg_rxlb_en),

drivers/phy/microchip/sparx5_serdes.c

1558

sdx5_rmw(SD25G_LANE_LANE_19_LN_CFG_TXLB_EN_SET(params->cfg_txlb_en),

drivers/phy/microchip/sparx5_serdes.c

1563

sdx5_rmw(SD25G_LANE_LANE_2E_LN_CFG_RSTN_DFEDIG_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1568

sdx5_rmw(SD25G_LANE_LANE_2E_LN_CFG_RSTN_DFEDIG_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1573

sdx5_rmw(SD_LANE_25G_SD_LANE_CFG_MACRO_RST_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1578

sdx5_rmw(SD25G_LANE_LANE_1C_LN_CFG_CDR_RSTN_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1585

sdx5_rmw(SD25G_LANE_LANE_1C_LN_CFG_CDR_RSTN_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1592

sdx5_rmw(SD25G_LANE_CMU_FF_REGISTER_TABLE_INDEX_SET(0xff),

drivers/phy/microchip/sparx5_serdes.c

1612

sdx5_rmw(SD25G_LANE_CMU_2A_R_DBG_LOL_STATUS_SET(0x1),

drivers/phy/microchip/sparx5_serdes.c

1617

sdx5_rmw(SD_LANE_25G_SD_SER_RST_SER_RST_SET(0x0),

drivers/phy/microchip/sparx5_serdes.c

1622

sdx5_rmw(SD_LANE_25G_SD_DES_RST_DES_RST_SET(0x0),

drivers/phy/microchip/sparx5_serdes.c

1627

sdx5_rmw(SD25G_LANE_CMU_FF_REGISTER_TABLE_INDEX_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1632

sdx5_rmw(SD25G_LANE_LANE_2D_LN_CFG_ALOS_THR_2_0_SET

drivers/phy/microchip/sparx5_serdes.c

1638

sdx5_rmw(SD25G_LANE_LANE_2E_LN_CFG_DIS_SQ_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1643

sdx5_rmw(SD25G_LANE_LANE_2E_LN_CFG_PD_SQ_SET(0),

drivers/phy/microchip/sparx5_serdes.c

1691

sdx5_rmw(SD_LANE_SD_LANE_CFG_MACRO_RST_SET(1),

drivers/phy/microchip/sparx5_serdes.c

1734

sdx5_rmw(SD_LANE_SD_LANE_CFG_RX_REF_SEL_SET(params->cmu_sel) |

drivers/phy/microchip/sparx5_serdes.c

2061

sdx5_rmw(SD_LANE_SD_LANE_CFG_MACRO_RST_SET(0),

drivers/phy/microchip/sparx5_serdes.c

2071

sdx5_rmw(SD10G_LANE_LANE_50_CFG_SSC_RESETB_SET(1),

drivers/phy/microchip/sparx5_serdes.c

2076

sdx5_rmw(SD_LANE_MISC_SD_125_RST_DIS_SET(params->fx_100),

drivers/phy/microchip/sparx5_serdes.c

2081

sdx5_rmw(SD_LANE_MISC_RX_ENA_SET(params->fx_100),

drivers/phy/microchip/sparx5_serdes.c

2086

sdx5_rmw(SD_LANE_MISC_MUX_ENA_SET(params->fx_100),

drivers/phy/microchip/sparx5_serdes.c

2100

sdx5_rmw(SD_LANE_SD_SER_RST_SER_RST_SET(0x0),

drivers/phy/microchip/sparx5_serdes.c

2105

sdx5_rmw(SD_LANE_SD_DES_RST_DES_RST_SET(0x0),

drivers/phy/microchip/sparx5_serdes.c

2222

sdx5_rmw(SD_LANE_MISC_CORE_CLK_FREQ_SET(freq),