rtw_write8_set
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN,
rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_GNT_BT_AWAKE);
rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf);
rtw_write8_set(rtwdev, REG_SYS_SDIO_CTRL + 3,
rtw_write8_set(rtwdev, btg_reg->addr, btg_reg->mask);
rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN);
rtw_write8_set(rtwdev, REG_FWHW_TXQ_CTRL + 2, BIT_EN_WR_FREE_TAIL >> 16);
rtw_write8_set(rtwdev, REG_TXDMA_OFFSET_CHK + 1, BIT(1));
rtw_write8_set(rtwdev, REG_AUTO_LLT_V1, BIT_AUTO_INIT_LLT_V1);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN + 1, sys_func_en);
rtw_write8_set(rtwdev, REG_SYS_CLKR, BIT_WAKEPAD_EN);
rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT_WLMCU_IOIF);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN + 1, BIT_FEN_CPUEN);
rtw_write8_set(rtwdev, REG_CPU_DMEM_CON + 2, BIT_WL_PLATFORM_RST >> 16);
rtw_write8_set(rtwdev, REG_SYS_CLK_CTRL + 1, BIT_CPU_CLK_EN >> 8);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN + 1, BIT_FEN_CPUEN);
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_FWDL_CHK_RPT);
rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2,
rtw_write8_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
rtw_write8_set(rtwdev, REG_RF_CTRL,
rtw_write8_set(rtwdev, REG_HIQ_NO_LMT_EN, 0xff);
rtw_write8_set(rtwdev, REG_SINGLE_AMPDU_CTRL, BIT_EN_SINGLE_APMDU);
rtw_write8_set(rtwdev, REG_HIQ_NO_LMT_EN, BIT_HIQ_NO_LMT_EN_ROOT);
rtw_write8_set(rtwdev, REG_RF_CTRL,
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN);
rtw_write8_set(rtwdev, REG_GNT_BT, BIT(2) | BIT(1));
rtw_write8_set(rtwdev, REG_GPIO_MUXCFG + 2, 0xf0);
rtw_write8_set(rtwdev, REG_GPIO_MUXCFG + 2, 0xc0);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_USBA);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_PCIEA);
rtw_write8_set(rtwdev, REG_SYS_CFG3_8814A + 2,
rtw_write8_set(rtwdev, REG_GPIO_PIN_CTRL + 2, BIT(7));
rtw_write8_set(rtwdev, REG_GPIO_PIN_CTRL + 1, BIT(7));
rtw_write8_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7));
rtw_write8_set(rtwdev, REG_PAD_CTRL1, BIT(2));
rtw_write8_set(rtwdev, REG_PAD_CTRL1 + 1, BIT(0));
rtw_write8_set(rtwdev, REG_LED_CFG + 3,
rtw_write8_set(rtwdev, REG_SYS_CFG3_8814A + 2, BIT_FEN_BB_RSTB);
rtw_write8_set(rtwdev, REG_GNT_BT, BIT_PTA_SW_CTL);
rtw_write8_set(rtwdev, REG_GNT_BT, BIT_PTA_SW_CTL);
rtw_write8_set(rtwdev, REG_GNT_BT, BIT_PTA_SW_CTL);
rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
rtw_write8_set(rtwdev, REG_INIRTS_RATE_SEL, BIT(5));
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_WMAC_TRXPTCL_CTL_H, BIT(1));
rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL,
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN);
rtw_write8_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
rtw_write8_set(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN,
rtw_write8_set(rtwdev, REG_RF_CTRL,
rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL,
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN,
rtw_write8_set(rtwdev, REG_RF_CTRL,
rtw_write8_set(rtwdev, REG_TX_HANG_CTRL, BIT_EN_EOF_V1);
rtw_write8_set(rtwdev, REG_RD_CTRL + 1,
rtw_write8_set(rtwdev, REG_MISC_CTRL,
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL,
rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN);
rtw_write8_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7));
rtw_write8_set(rtwdev, REG_SINGLE_AMPDU_CTRL, BIT_EN_SINGLE_APMDU);
rtw_write8_set(rtwdev, REG_RSV_CTRL, BIT(5) | BIT(6));
rtw_write8_set(rtwdev, REG_CR, BIT_MACTXEN | BIT_MACRXEN);
rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(3));
rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(0));
rtw_write8_set(rtwdev, REG_APS_FSMCO + 1, APS_FSMCO_MAC_OFF >> 8);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN + 1, BIT(4) | BIT(7));
rtw_write8_set(rtwdev, REG_LDO_SWR_CTRL, BIT(6));
rtw_write8_set(rtwdev, REG_USB_MOD, 0x18);
rtw_write8_set(rtwdev, REG_RFE_INV_A + 3, BIT(0));
rtw_write8_set(rtwdev, REG_CCK_CHECK, BIT_CHECK_CCK_EN);
rtw_write8_set(rtwdev, REG_RXDMA_AGG_PG_TH + 3, BIT(7));
rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN);
rtw_write8_set(rtwdev, REG_RXDMA_MODE, BIT_DMA_MODE);
rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN);
rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN);
rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_BB_RSTB);