rtw_write8_clr
rtw_write8_clr(rtwdev, REG_RXFLTMAP1, BIT_RXFLTMAP1_BF_REPORT_POLL);
rtw_write8_clr(rtwdev, REG_RXFLTMAP4, BIT_RXFLTMAP4_BF_REPORT_POLL);
rtw_write8_clr(rtwdev, REG_TX_HANG_CTRL, BIT_EN_GNT_BT_AWAKE);
rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf);
rtw_write8_clr(rtwdev, REG_SYS_SDIO_CTRL + 3,
rtw_write8_clr(rtwdev, btg_reg->addr, btg_reg->mask);
rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2,
rtw_write8_clr(rtwdev, REG_SYS_STATUS1 + 1, BIT(0));
rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN + 1, BIT_FEN_CPUEN);
rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT_WLMCU_IOIF);
rtw_write8_clr(rtwdev, REG_CPU_DMEM_CON + 2, BIT_WL_PLATFORM_RST >> 16);
rtw_write8_clr(rtwdev, REG_SYS_CLK_CTRL + 1, BIT_CPU_CLK_EN >> 8);
rtw_write8_clr(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT_HCI_SUS_REQ);
rtw_write8_clr(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write8_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE);
rtw_write8_clr(rtwdev, REG_FWHW_TXQ_CTRL, BIT_MASK_TXQ_INIT);
rtw_write8_clr(rtwdev, REG_GNT_BT, BIT(2) | BIT(1));
rtw_write8_clr(rtwdev, REG_SYS_SDIO_CTRL + 3,
rtw_write8_clr(rtwdev, REG_GPIO_MUXCFG, BIT(5));
rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT(3));
rtw_write8_clr(rtwdev, REG_GPIO_MUXCFG, BIT(1) | BIT(0));
rtw_write8_clr(rtwdev, REG_GPIO_PIN_CTRL + 3, BIT(7));
rtw_write8_clr(rtwdev, REG_USB_MOD, BIT(4) | BIT(3));
rtw_write8_clr(rtwdev, REG_SW_AMPDU_BURST_MODE_CTRL,
rtw_write8_clr(rtwdev, REG_SYS_CFG3_8814A + 2, BIT_FEN_BB_RSTB);
rtw_write8_clr(rtwdev, REG_GNT_BT, BIT_PTA_SW_CTL);
rtw_write8_clr(rtwdev, REG_GNT_BT, BIT_PTA_SW_CTL);
rtw_write8_clr(rtwdev, REG_TIMER0_SRC_SEL, BIT_TSFT_SEL_TIMER0);
rtw_write8_clr(rtwdev, REG_TX_PTCL_CTRL + 1, BIT_SIFS_BK_EN >> 8);
rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN);
rtw_write8_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE1);
rtw_write8_clr(rtwdev, REG_CTRL_TYPE, BIT_CTRL_TYPE2);
rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN);
rtw_write8_clr(rtwdev, REG_SW_AMPDU_BURST_MODE_CTRL, BIT_PRE_TX_CMD);
rtw_write8_clr(rtwdev, REG_TIMER0_SRC_SEL, BIT_TSFT_SEL_TIMER0);
rtw_write8_clr(rtwdev, REG_TX_PTCL_CTRL + 1, BIT_SIFS_BK_EN >> 8);
rtw_write8_clr(rtwdev, REG_LIFETIME_EN, BIT_BA_PARSER_EN);
rtw_write8_clr(rtwdev, REG_TX_PTCL_CTRL + 1, BIT_SIFS_BK_EN >> 8);
rtw_write8_clr(rtwdev, REG_TIMER0_SRC_SEL, BIT_TSFT_SEL_TIMER0);
rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN);
rtw_write8_clr(rtwdev, REG_DUMMY_PAGE4_V1, BIT_BTCCA_CTRL);
rtw_write8_clr(rtwdev, REG_USB_MOD, BIT(4) | BIT(3));
rtw_write8_clr(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7));
rtw_write8_clr(rtwdev, REG_GPIO_MUXCFG, BIT(5));
rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT(3));
rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1));
rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(3));
rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(0));
rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1));
rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN, BIT(0) | BIT(1));
rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN + 1, BIT(4) | BIT(7));
rtw_write8_clr(rtwdev, REG_TX_RPT_CTRL, BIT(1));
rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN + 1, BIT(2));
rtw_write8_clr(rtwdev, REG_RFE_INV_A + 3, BIT(0));
rtw_write8_clr(rtwdev, REG_CCK_CHECK, BIT_CHECK_CCK_EN);
rtw_write8_clr(rtwdev, REG_SYS_SDIO_CTRL, BIT(1));
rtw_write8_clr(rtwdev, REG_ACLK_MON, BIT(0));
rtw_write8_clr(rtwdev, REG_SW_MDIO + 3, BIT(0));
rtw_write8_clr(rtwdev, REG_RXDMA_AGG_PG_TH + 3, BIT(7));
rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_BB_RSTB);