scratch_reg
if (IS_ENABLED(CONFIG_64BIT) && (scratch_reg >= 0 || scratchpad_available()) && use_bbit_insns()) {
scratch_reg);
scratch_reg = allocate_kscratch();
static int scratch_reg;
if (scratch_reg >= 0) {
UASM_i_MTC0(p, 1, c0_kscratch(), scratch_reg);
if (scratch_reg >= 0) {
UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
if (scratch_reg >= 0)
if (scratch_reg >= 0)
UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
if (mode == refill_scratch && scratch_reg >= 0)
if (scratch_reg >= 0)
UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
.macro SWITCH_TO_USER_CR3 scratch_reg:req scratch_reg2:req
.macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req
.macro SWITCH_TO_USER_CR3_STACK scratch_reg:req
SWITCH_TO_USER_CR3 scratch_reg=\scratch_reg scratch_reg2=%rax
.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
.macro PARANOID_RESTORE_CR3 scratch_reg:req save_reg:req
.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
.macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req
.macro SWITCH_TO_USER_CR3_STACK scratch_reg:req
.macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req
.macro PARANOID_RESTORE_CR3 scratch_reg:req save_reg:req
.macro SAVE_AND_SET_GSBASE scratch_reg:req save_reg:req
unsigned long *sr = scratch_reg(auprobe, regs);
unsigned long *sr = scratch_reg(auprobe, regs);
radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));
radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));
radeon_ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
uint32_t scratch_reg;
uint32_t scratch_reg;
scratch_reg = R600_BIOS_0_SCRATCH;
scratch_reg = RADEON_BIOS_0_SCRATCH;
rdev->bios_scratch[i] = RREG32(scratch_reg + (i * 4));
uint32_t scratch_reg;
scratch_reg = R600_BIOS_0_SCRATCH;
scratch_reg = RADEON_BIOS_0_SCRATCH;
WREG32(scratch_reg + (i * 4), rdev->bios_scratch[i]);
if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
WREG32(drv->scratch_reg, seq);
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
rdev->fence_drv[ring].scratch_reg = 0;
r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
rdev->fence_drv[ring].scratch_reg -
rdev->fence_drv[ring].scratch_reg = -1;
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
seq = RREG32(drv->scratch_reg);
unsigned int scratch_reg;
card->scratch_reg = IF_SDIO_SCRATCH_OLD;
card->scratch_reg = IF_SDIO_SCRATCH;
card->scratch_reg = IF_SDIO_FW_STATUS;
scratch = sdio_readb(card->func, card->scratch_reg, &ret);
scratch |= sdio_readb(card->func, card->scratch_reg + 1,