arch/riscv/errata/andes/errata.c

36

ret = sbi_ecall(ANDES_SBI_EXT_ANDES, ANDES_SBI_EXT_IOCP_SW_WORKAROUND,

arch/riscv/include/asm/kvm_nacl.h

198

sbi_ecall(SBI_EXT_NACL, SBI_EXT_NACL_SYNC_CSR, \

arch/riscv/include/asm/kvm_nacl.h

98

sbi_ecall(SBI_EXT_NACL, SBI_EXT_NACL_SYNC_HFENCE, \

arch/riscv/kernel/cpu_ops_sbi.c

31

ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START,

arch/riscv/kernel/cpu_ops_sbi.c

44

ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STOP, 0, 0, 0, 0, 0, 0);

arch/riscv/kernel/cpu_ops_sbi.c

56

ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STATUS,

arch/riscv/kernel/paravirt.c

53

ret = sbi_ecall(SBI_EXT_STA, SBI_EXT_STA_STEAL_TIME_SET_SHMEM,

arch/riscv/kernel/sbi.c

102

sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);

arch/riscv/kernel/sbi.c

110

sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask),

arch/riscv/kernel/sbi.c

128

sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,

arch/riscv/kernel/sbi.c

132

sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,

arch/riscv/kernel/sbi.c

137

sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,

arch/riscv/kernel/sbi.c

182

sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,

arch/riscv/kernel/sbi.c

185

sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,

arch/riscv/kernel/sbi.c

195

ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,

arch/riscv/kernel/sbi.c

215

ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0);

arch/riscv/kernel/sbi.c

218

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

222

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

227

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

231

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

235

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

239

ret = sbi_ecall(ext, fid, hmask, hbase, start,

arch/riscv/kernel/sbi.c

336

ret = sbi_ecall(SBI_EXT_FWFT, SBI_EXT_FWFT_SET,

arch/riscv/kernel/sbi.c

513

sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,

arch/riscv/kernel/sbi.c

547

ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,

arch/riscv/kernel/sbi.c

60

sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);

arch/riscv/kernel/sbi.c

608

ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,

arch/riscv/kernel/sbi.c

612

ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,

arch/riscv/kernel/sbi.c

637

ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,

arch/riscv/kernel/sbi.c

641

ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,

arch/riscv/kernel/sbi.c

73

ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);

arch/riscv/kernel/sbi.c

86

sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);

arch/riscv/kernel/sbi.c

99

sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,

arch/riscv/kernel/sbi_ecall.c

12

ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0);

arch/riscv/kernel/suspend.c

118

ret = sbi_ecall(SBI_EXT_SUSP, SBI_EXT_SUSP_SYSTEM_SUSPEND,

arch/riscv/kernel/suspend.c

156

ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND,

arch/riscv/kvm/nacl.c

109

ret = sbi_ecall(SBI_EXT_NACL, SBI_EXT_NACL_PROBE_FEATURE,

arch/riscv/kvm/nacl.c

63

ret = sbi_ecall(SBI_EXT_NACL, SBI_EXT_NACL_SET_SHMEM,

arch/riscv/kvm/nacl.c

77

sbi_ecall(SBI_EXT_NACL, SBI_EXT_NACL_SET_SHMEM,

drivers/acpi/riscv/cppc.c

53

data->ret = sbi_ecall(SBI_EXT_CPPC, SBI_CPPC_READ,

drivers/acpi/riscv/cppc.c

61

data->ret = sbi_ecall(SBI_EXT_CPPC, SBI_CPPC_WRITE,

drivers/mailbox/mailbox-mchp-ipc-sbi.c

121

ret = sbi_ecall(SBI_EXT_MICROCHIP_TECHNOLOGY, command, channel,

drivers/mailbox/mailbox-mchp-ipc-sbi.c

134

ret = sbi_ecall(SBI_EXT_MICROCHIP_TECHNOLOGY, command, address,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

143

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_GET_CHANNEL_IDS,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

172

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_GET_CHANNEL_IDS,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

204

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_READ_ATTRS,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

230

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_WRITE_ATTRS,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

257

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_SEND_MSG_WITH_RESP,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

292

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_SEND_MSG_WITHOUT_RESP,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

313

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_GET_NOTIFICATION_EVENTS,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

330

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_GET_SHMEM_SIZE,

drivers/mailbox/riscv-sbi-mpxy-mbox.c

357

sret = sbi_ecall(SBI_EXT_MPXY, SBI_EXT_MPXY_SET_SHMEM,

drivers/perf/riscv_pmu_sbi.c

1025

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx * BITS_PER_LONG,

drivers/perf/riscv_pmu_sbi.c

329

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_EVENT_GET_INFO, lower_32_bits(base_addr),

drivers/perf/riscv_pmu_sbi.c

332

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_EVENT_GET_INFO, base_addr, 0,

drivers/perf/riscv_pmu_sbi.c

367

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH,

drivers/perf/riscv_pmu_sbi.c

370

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP,

drivers/perf/riscv_pmu_sbi.c

567

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase,

drivers/perf/riscv_pmu_sbi.c

571

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase,

drivers/perf/riscv_pmu_sbi.c

696

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM, SBI_SHMEM_DISABLE,

drivers/perf/riscv_pmu_sbi.c

719

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,

drivers/perf/riscv_pmu_sbi.c

723

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,

drivers/perf/riscv_pmu_sbi.c

757

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_FW_READ,

drivers/perf/riscv_pmu_sbi.c

764

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_FW_READ_HI,

drivers/perf/riscv_pmu_sbi.c

807

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, hwc->idx,

drivers/perf/riscv_pmu_sbi.c

810

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, hwc->idx,

drivers/perf/riscv_pmu_sbi.c

837

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, hwc->idx, 1, flag, 0, 0, 0);

drivers/perf/riscv_pmu_sbi.c

862

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_NUM_COUNTERS, 0, 0, 0, 0, 0, 0);

drivers/perf/riscv_pmu_sbi.c

880

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_GET_INFO, i, 0, 0, 0, 0, 0);

drivers/perf/riscv_pmu_sbi.c

906

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP,

drivers/perf/riscv_pmu_sbi.c

927

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, i * BITS_PER_LONG,

drivers/perf/riscv_pmu_sbi.c

969

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, i * BITS_PER_LONG,

drivers/perf/riscv_pmu_sbi.c

982

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1,

drivers/perf/riscv_pmu_sbi.c

985

sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1,

tools/testing/selftests/kvm/include/riscv/sbi.h

124

struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,

tools/testing/selftests/kvm/include/riscv/ucall.h

16

sbi_ecall(KVM_RISCV_SELFTESTS_SBI_EXT,

tools/testing/selftests/kvm/lib/riscv/processor.c

304

sbi_ecall(KVM_RISCV_SELFTESTS_SBI_EXT,

tools/testing/selftests/kvm/lib/riscv/processor.c

508

ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,

tools/testing/selftests/kvm/lib/riscv/processor.c

527

ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_SPEC_VERSION, 0,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

104

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, counter, 1, start_flags,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

114

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, counter, 1,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

124

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, counter, 1, stop_flags,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

185

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, cmask,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

198

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_NUM_COUNTERS, 0, 0, 0, 0, 0, 0);

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

213

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_GET_INFO, i, 0, 0, 0, 0, 0);

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

231

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_FW_READ, idx, 0, 0, 0, 0, 0);

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

270

struct sbiret ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

409

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, 0,

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

446

ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_GET_INFO, i,

tools/testing/selftests/kvm/steal_time.c

231

struct sbiret ret = sbi_ecall(SBI_EXT_STA, 0, lo, hi, flags, 0, 0, 0);