rtl8xxxu_write32_clear
rtl8xxxu_write32_clear(priv, REG_FPGA0_XCD_RF_PARM, BIT(31));
rtl8xxxu_write32_clear(priv, REG_LEDCFG0, 0x6c00000);
rtl8xxxu_write32_clear(priv, REG_SW_GPIO_SHARE_CTRL_0,
rtl8xxxu_write32_clear(priv, REG_RFE_OPT62, BIT(2));
rtl8xxxu_write32_clear(priv, REG_GPIO_INTM, BIT(16));
rtl8xxxu_write32_clear(priv, REG_PAD_CTRL1, BIT(28));
rtl8xxxu_write32_clear(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT, GENMASK(31, 30));
rtl8xxxu_write32_clear(priv, REG_FPGA0_RF_MODE, FPGA_RF_MODE_OFDM);
int rtl8xxxu_write32_clear(struct rtl8xxxu_priv *priv, u16 addr, u32 bits);