s3
LONG_SPTR s3, \thread, (THREAD_REG26 - TASK_STRUCT_OFFSET)
LONG_LPTR s3, \thread, (THREAD_REG26 - TASK_STRUCT_OFFSET)
cfi_st s3, PT_R26, \docfi
cfi_ld s3, PT_R26, \docfi
#define ____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\
" .ifnc \""#s3"\",\"\"\n" \
"3: "MOVES"."#s3" (%2)+,%3\n" \
" move."#s3" %3,(%1)+\n" \
" .ifnc \""#s3"\",\"\"\n" \
" .ifnc \""#s3"\",\"\"\n" \
#define ___constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\
____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)
#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \
" .ifnc \""#s3"\",\"\"\n" \
" move."#s3" (%2)+,%3\n" \
"31: "MOVES"."#s3" %3,(%1)+\n" \
" .ifnc \""#s3"\",\"\"\n" \
LONG_S s3, THREAD_REG19(\thread)
LONG_L s3, THREAD_REG19(\thread)
LONG_S s3, THREAD_REG19(\thread)
LONG_L s3, THREAD_REG19(\thread)
REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
regs->s3 = (unsigned long) cregs->s3;
compat_ulong_t s3;
cregs->s3 = (compat_ulong_t) regs->s3;
unsigned long s3;
unsigned long s3;
unsigned long s3;
OFFSET(PT_S3, pt_regs, s3);
OFFSET(KVM_ARCH_GUEST_S3, kvm_vcpu_arch, guest_context.s3);
OFFSET(KVM_ARCH_HOST_S3, kvm_vcpu_arch, host_context.s3);
{DBG_REG_S3, GDB_SIZEOF_REG, offsetof(struct pt_regs, s3)},
regs->s2, regs->s3, regs->s4);
REG_OFFSET_NAME(s3),
[RV_REG_S3] = offsetof(struct pt_regs, s3),
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
} s3;
uv_cpuid.m_skt = m_n_config.s3.m_skt;
mnp->n_lshift = m_gr_config.s3.m_skt;
is_uv(UV3) ? sname.s3.field : \
(((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]))
(((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]))
(((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]))
(((s1[I >> 24] ^ s2[(I>>16)&0xff]) - s3[(I>>8)&0xff]) + s4[I&0xff]))
(((s1[I >> 24] - s2[(I>>16)&0xff]) + s3[(I>>8)&0xff]) ^ s4[I&0xff]))
(((s1[I >> 24] + s2[(I>>16)&0xff]) ^ s3[(I>>8)&0xff]) - s4[I&0xff]))
int s1, s2, s3, s4;
s3 = inb_p(synth_port + 2);
pr_warn("synth timeout %d %d %d %d\n", s1, s2, s3, s4);
int s0, s1, s3;
if ((s3 = mt352_read_register(state, STATUS_3)) < 0)
if (s3 & (1 << 6))
bool s1, s2, s3;
s3 = name[strlen(name) - 1] == '3';
if ((val & BLT_TTY_ALPHA_R) && !s3)
if ((val & BLT_S1TY_A1_SUBSET) && !s3)
if ((val & BLT_S3TY_BLANK_ACC) && s3)
if ((val & BTL_S1TY_SUBBYTE) && !s3)
if ((val & BLT_S1TY_RGB_EXP) && !s3)
if ((val & BLT_TTY_BIG_END) && !s3)
s3 = vp7045_read_reg(state->d,0x03);
if (s3 & (1 << 6))
unsigned char s1, s2, s3;
s3 = r_str(ppb) & 0x38;
if ((s1 == 0xb8) && (s2 == 0x18) && (s3 == 0x30))
if ((s1 == 0xb8) && (s2 == 0x18) && (s3 == 0x38))
struct sli3_desc s3;
phba->host_gp = &mb_slim->us.s3.host[0];
phba->hbq_put = &mb_slim->us.s3.hbq_put[0];
char s1[15], s2[15], s3[17], junk;
res = sscanf(str, "%10s %10s %16s %c", s1, s2, s3, &junk);
if (check_set(&lun, s3))
#define VALID_SENSOR_MAP(s0, s1, s2, s3) \
((s3) ? BIT(3) : 0))
xhci->s3.command = readl(&xhci->op_regs->command);
xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
writel(xhci->s3.command, &xhci->op_regs->command);
writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
struct s3_save s3;
__u32 s1, s2, s3, s4;
state->s3 = __seed(i, 16U);
struct fetch_insn *s3 = NULL;
s3 = code;
code = s3;
if (s3->op != FETCH_OP_ST_STRING &&
s3->op != FETCH_OP_ST_USTRING) {
dest += s3->size;
val += s3->size;
u128 s3 = ((((((u128)(d0) * (r3))) + (((u128)(d1) * (r2))))) +
tmp[3] = s3;
u32 s1, s2, s3, s4;
s3 = key->precomputed_s.r[2];
((u64)h2 * s3) + ((u64)h3 * s2) +
((u64)h2 * s4) + ((u64)h3 * s3) +
((u64)h4 * s3);
state->s3 = __seed(seeds[2], 16U);
state->s3 = __seed(LCG(state->s2), 16U);
state->s4 = __seed(LCG(state->s3), 128U);
state->s3 = TAUSWORTHE(state->s3, 13U, 21U, 4294967280U, 7U);
return (state->s1 ^ state->s2 ^ state->s3 ^ state->s4);
goto s3;
s3:
u32 s0, s1, s2, s3;
s3 = peak_map[(chip->rmh.stat[0] >> 12) & 0xf];
s0 = s1 = s2 = s3 = 0;
r_levels[3] = s3;
static int kvp_write_file(FILE *f, char *s1, char *s2, char *s3)
ret = fprintf(f, "%s%s%s%s\n", s1, s2, "=", s3);
state->s3 = __seed(i, 16U);
state->s3 = TAUSWORTHE(state->s3, 13U, 21U, 4294967280U, 7U);
return (state->s1 ^ state->s2 ^ state->s3 ^ state->s4);
__u32 s1, s2, s3, s4;
{ "s3", offsetof(struct user_regs_struct, s3) },
struct s3;
struct s3 *s3;
struct s3 s3;
unsigned long s3;
core.regs.s3 = vcpu_get_reg(vcpu, RISCV_CORE_REG(regs.s3));
core.regs.a6, core.regs.a7, core.regs.s2, core.regs.s3);
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s3),