arch/loongarch/include/asm/asmmacro.h

21

LONG_SPTR s0, \thread, (THREAD_REG23 - TASK_STRUCT_OFFSET)

arch/loongarch/include/asm/asmmacro.h

36

LONG_LPTR s0, \thread, (THREAD_REG23 - TASK_STRUCT_OFFSET)

arch/loongarch/include/asm/stackframe.h

110

cfi_st s0, PT_R23, \docfi

arch/loongarch/include/asm/stackframe.h

225

cfi_ld s0, PT_R23, \docfi

arch/mips/alchemy/devboards/db1000.c

453

int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1;

arch/mips/alchemy/devboards/db1000.c

464

s0 = AU1500_GPIO1_INT;

arch/mips/alchemy/devboards/db1000.c

471

s0 = AU1100_GPIO1_INT;

arch/mips/alchemy/devboards/db1000.c

511

s0 = AU1000_GPIO1_INT;

arch/mips/alchemy/devboards/db1000.c

517

s0 = AU1500_GPIO202_INT;

arch/mips/alchemy/devboards/db1000.c

530

s0 = AU1100_GPIO10_INT;

arch/mips/alchemy/devboards/db1000.c

547

irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);

arch/mips/include/asm/asmmacro-32.h

65

LONG_S s0, THREAD_REG16(\thread)

arch/mips/include/asm/asmmacro-32.h

78

LONG_L s0, THREAD_REG16(\thread)

arch/mips/include/asm/asmmacro-64.h

18

LONG_S s0, THREAD_REG16(\thread)

arch/mips/include/asm/asmmacro-64.h

31

LONG_L s0, THREAD_REG16(\thread)

arch/mips/include/asm/mach-loongson64/kernel-entry-init.h

87

mfc0 s0, CP0_PRID

arch/mips/include/asm/mach-loongson64/kernel-entry-init.h

88

andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)

arch/mips/include/asm/mach-loongson64/kernel-entry-init.h

89

beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f

arch/mips/include/asm/mach-loongson64/kernel-entry-init.h

90

beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f

arch/riscv/include/asm/assembler.h

41

REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)

arch/riscv/include/asm/compat.h

121

regs->s0 = (unsigned long) cregs->s0;

arch/riscv/include/asm/compat.h

47

compat_ulong_t s0;

arch/riscv/include/asm/compat.h

84

cregs->s0 = (compat_ulong_t) regs->s0;

arch/riscv/include/asm/ftrace.h

131

unsigned long s0;

arch/riscv/include/asm/ftrace.h

177

return arch_ftrace_regs(fregs)->s0;

arch/riscv/include/asm/ftrace.h

218

regs->s0 = afregs->s0;

arch/riscv/include/asm/kvm_host.h

125

unsigned long s0;

arch/riscv/include/asm/perf_event.h

17

(regs)->s0 = (unsigned long) __builtin_frame_address(0); \

arch/riscv/include/asm/ptrace.h

104

return regs->s0;

arch/riscv/include/asm/ptrace.h

109

regs->s0 = val;

arch/riscv/include/asm/ptrace.h

24

unsigned long s0;

arch/riscv/include/uapi/asm/ptrace.h

34

unsigned long s0;

arch/riscv/kernel/asm-offsets.c

148

OFFSET(KVM_ARCH_GUEST_S0, kvm_vcpu_arch, guest_context.s0);

arch/riscv/kernel/asm-offsets.c

185

OFFSET(KVM_ARCH_HOST_S0, kvm_vcpu_arch, host_context.s0);

arch/riscv/kernel/asm-offsets.c

518

DEFINE(FREGS_S0, offsetof(struct __arch_ftrace_regs, s0));

arch/riscv/kernel/asm-offsets.c

98

OFFSET(PT_FP, pt_regs, s0);

arch/riscv/kernel/asm-offsets.c

99

OFFSET(PT_S0, pt_regs, s0);

arch/riscv/kernel/ftrace.c

254

unsigned long frame_pointer = arch_ftrace_regs(fregs)->s0;

arch/riscv/kernel/kgdb.c

177

{DBG_REG_FP, GDB_SIZEOF_REG, offsetof(struct pt_regs, s0)},

arch/riscv/kernel/probes/rethook.c

13

return rethook_trampoline_handler(regs, regs->s0);

arch/riscv/kernel/probes/rethook.c

21

rhn->frame = regs->s0;

arch/riscv/kernel/process.c

81

regs->t1, regs->t2, regs->s0);

arch/riscv/kernel/ptrace.c

458

REG_OFFSET_NAME(s0),

arch/riscv/kernel/stacktrace.c

219

fp = regs->s0;

arch/riscv/kernel/stacktrace.c

98

fp = ((struct pt_regs *)sp)->s0;

arch/x86/include/asm/string_64.h

34

const auto s0 = s;

arch/x86/include/asm/string_64.h

41

return s0;

arch/x86/include/asm/string_64.h

47

const auto s0 = s;

arch/x86/include/asm/string_64.h

54

return s0;

arch/x86/include/asm/string_64.h

60

const auto s0 = s;

arch/x86/include/asm/string_64.h

67

return s0;

arch/x86/math-emu/fpu_proto.h

102

extern int poly_l2p1(u_char s0, u_char s1, FPU_REG *r0, FPU_REG *r1,

drivers/devfreq/event/exynos-ppmu.c

76

PPMU_EVENT(drex0-s0),

drivers/devfreq/event/exynos-ppmu.c

78

PPMU_EVENT(drex1-s0),

drivers/fsi/fsi-sbefifo.c

224

u32 dh, s0, s1;

drivers/fsi/fsi-sbefifo.c

238

s0 = be32_to_cpu(response[resp_len - dh]);

drivers/fsi/fsi-sbefifo.c

240

if (((s0 >> 16) != 0xC0DE) || ((s0 & 0xffff) != cmd)) {

drivers/fsi/fsi-sbefifo.c

242

cmd >> 8, cmd & 0xff, s0, s1);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5893

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5904

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5918

table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5928

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6019

table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ?

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6111

mc_reg_table->address[i].s0 =

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6112

cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.h

207

uint16_t s0;

drivers/gpu/drm/amd/pm/legacy-dpm/sislands_smc.h

298

uint16_t s0;

drivers/gpu/drm/amd/pm/powerplay/inc/smu71_discrete.h

352

uint16_t s0;

drivers/gpu/drm/amd/pm/powerplay/inc/smu72_discrete.h

357

uint16_t s0;

drivers/gpu/drm/amd/pm/powerplay/inc/smu7_discrete.h

412

uint16_t s0;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1734

mc_reg_table->address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1735

PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2547

table->mc_reg_address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2599

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2611

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2626

table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2639

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1699

mc_reg_table->address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1700

PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2474

table->mc_reg_address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2526

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2538

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2554

table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD;

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2567

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2077

mc_reg_table->address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2078

PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2936

table->mc_reg_address[i].s0 =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2991

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3003

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3018

table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3030

table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP;

drivers/gpu/drm/radeon/btc_dpm.c

1898

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;

drivers/gpu/drm/radeon/btc_dpm.c

1911

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;

drivers/gpu/drm/radeon/btc_dpm.c

1927

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;

drivers/gpu/drm/radeon/btc_dpm.c

1954

table->mc_reg_address[i].s0 =

drivers/gpu/drm/radeon/ci_dpm.c

4300

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;

drivers/gpu/drm/radeon/ci_dpm.c

4311

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;

drivers/gpu/drm/radeon/ci_dpm.c

4324

table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2;

drivers/gpu/drm/radeon/ci_dpm.c

4337

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;

drivers/gpu/drm/radeon/ci_dpm.c

4451

table->mc_reg_address[i].s0 =

drivers/gpu/drm/radeon/ci_dpm.c

4643

mc_reg_table->address[i].s0 = cpu_to_be16(pi->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/radeon/cypress_dpm.c

1002

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D1_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1006

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1010

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1014

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1018

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC1 >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1022

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RESERVE_M >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1026

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC3 >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

1176

WREG32(eg_pi->mc_reg_table.mc_reg_address[i].s0 << 2, value);

drivers/gpu/drm/radeon/cypress_dpm.c

958

mc_reg_table->address[i].s0 =

drivers/gpu/drm/radeon/cypress_dpm.c

959

cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/radeon/cypress_dpm.c

974

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

978

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_CAS_TIMING_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

982

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

986

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

990

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D0_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

994

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D1_LP >> 2;

drivers/gpu/drm/radeon/cypress_dpm.c

998

eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2;

drivers/gpu/drm/radeon/evergreen_smc.h

33

uint16_t s0;

drivers/gpu/drm/radeon/ni_dpm.c

2728

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;

drivers/gpu/drm/radeon/ni_dpm.c

2739

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;

drivers/gpu/drm/radeon/ni_dpm.c

2754

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;

drivers/gpu/drm/radeon/ni_dpm.c

2843

table->mc_reg_address[i].s0 =

drivers/gpu/drm/radeon/ni_dpm.c

2935

mc_reg_table->address[i].s0 =

drivers/gpu/drm/radeon/ni_dpm.c

2936

cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/radeon/nislands_smc.h

250

uint16_t s0;

drivers/gpu/drm/radeon/si_dpm.c

5313

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2;

drivers/gpu/drm/radeon/si_dpm.c

5324

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2;

drivers/gpu/drm/radeon/si_dpm.c

5338

table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2;

drivers/gpu/drm/radeon/si_dpm.c

5350

table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;

drivers/gpu/drm/radeon/si_dpm.c

5444

table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ?

drivers/gpu/drm/radeon/si_dpm.c

5536

mc_reg_table->address[i].s0 =

drivers/gpu/drm/radeon/si_dpm.c

5537

cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0);

drivers/gpu/drm/radeon/sislands_smc.h

302

uint16_t s0;

drivers/gpu/drm/radeon/smu7_discrete.h

397

uint16_t s0;

drivers/infiniband/hw/mlx5/main.c

3338

struct ib_srq *s0, *s1;

drivers/infiniband/hw/mlx5/main.c

3362

s0 = ib_create_srq(devr->p0, &attr);

drivers/infiniband/hw/mlx5/main.c

3363

if (IS_ERR(s0)) {

drivers/infiniband/hw/mlx5/main.c

3364

ret = PTR_ERR(s0);

drivers/infiniband/hw/mlx5/main.c

3367

s0);

drivers/infiniband/hw/mlx5/main.c

3382

ib_destroy_srq(s0);

drivers/infiniband/hw/mlx5/main.c

3385

devr->s0 = s0;

drivers/infiniband/hw/mlx5/main.c

3424

ib_destroy_srq(devr->s0);

drivers/infiniband/hw/mlx5/mlx5_ib.h

867

struct ib_srq *s0;

drivers/infiniband/hw/mlx5/qp.c

2035

MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);

drivers/infiniband/hw/mlx5/qp.c

2359

MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);

drivers/media/dvb-frontends/mt352.c

410

int s0, s1, s3;

drivers/media/dvb-frontends/mt352.c

424

if ((s0 = mt352_read_register(state, STATUS_0)) < 0)

drivers/media/dvb-frontends/mt352.c

432

if (s0 & (1 << 4))

drivers/media/dvb-frontends/mt352.c

434

if (s0 & (1 << 1))

drivers/media/dvb-frontends/mt352.c

436

if (s0 & (1 << 5))

drivers/media/usb/dvb-usb/vp7045-fe.c

29

u8 s0 = vp7045_read_reg(state->d,0x00),

drivers/media/usb/dvb-usb/vp7045-fe.c

34

if (s0 & (1 << 4))

drivers/media/usb/dvb-usb/vp7045-fe.c

36

if (s0 & (1 << 1))

drivers/media/usb/dvb-usb/vp7045-fe.c

38

if (s0 & (1 << 5))

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

2101

unsigned int s0 = 0;

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

2115

XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, cmd);

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

2116

XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, sub_cmd);

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

2119

XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);

drivers/net/ethernet/cavium/octeon/octeon_mgmt.c

349

union cvmx_agl_gmx_txx_stat0 s0;

drivers/net/ethernet/cavium/octeon/octeon_mgmt.c

353

s0.u64 = cvmx_read_csr(p->agl + AGL_GMX_TX_STAT0);

drivers/net/ethernet/cavium/octeon/octeon_mgmt.c

356

if (s0.s.xsdef || s0.s.xscol || s1.s.scol || s1.s.mcol) {

drivers/net/ethernet/cavium/octeon/octeon_mgmt.c

359

netdev->stats.tx_errors += s0.s.xsdef + s0.s.xscol;

drivers/net/wireless/ath/ath9k/ar9003_mac.c

268

u32 s0, s1;

drivers/net/wireless/ath/ath9k/ar9003_mac.c

269

s0 = REG_READ(ah, AR_ISR_S0);

drivers/net/wireless/ath/ath9k/ar9003_mac.c

270

REG_WRITE(ah, AR_ISR_S0, s0);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

489

static bool _check_dack_done(struct rtw89_dev *rtwdev, bool s0)

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

491

if (s0) {

drivers/scsi/aha152x.c

2456

int s0, s1;

drivers/scsi/aha152x.c

2458

s0 = GETPORT(SIMODE0);

drivers/scsi/aha152x.c

2463

(s0 & ENSELDO) ? "ENSELDO " : "",

drivers/scsi/aha152x.c

2464

(s0 & ENSELDI) ? "ENSELDI " : "",

drivers/scsi/aha152x.c

2465

(s0 & ENSELINGO) ? "ENSELINGO " : "",

drivers/scsi/aha152x.c

2466

(s0 & ENSWRAP) ? "ENSWRAP " : "",

drivers/scsi/aha152x.c

2467

(s0 & ENSDONE) ? "ENSDONE " : "",

drivers/scsi/aha152x.c

2468

(s0 & ENSPIORDY) ? "ENSPIORDY " : "",

drivers/scsi/aha152x.c

2469

(s0 & ENDMADONE) ? "ENDMADONE " : "",

drivers/thermal/k3_bandgap.c

100

return (s0 + s1) / 2;

drivers/thermal/k3_bandgap.c

103

return (s0 + s2) / 2;

drivers/thermal/k3_bandgap.c

112

unsigned int dtemp, s0, s1, s2;

drivers/thermal/k3_bandgap.c

125

s0 = readl(bgp->base + devdata->stat_offset) &

drivers/thermal/k3_bandgap.c

131

dtemp = vtm_get_best_value(s0, s1, s2);

drivers/thermal/k3_bandgap.c

92

static unsigned int vtm_get_best_value(unsigned int s0, unsigned int s1,

drivers/thermal/k3_bandgap.c

95

int d01 = abs(s0 - s1);

drivers/thermal/k3_bandgap.c

96

int d02 = abs(s0 - s2);

drivers/thermal/k3_j72xx_bandgap.c

203

static unsigned int vtm_get_best_value(unsigned int s0, unsigned int s1,

drivers/thermal/k3_j72xx_bandgap.c

206

int d01 = abs(s0 - s1);

drivers/thermal/k3_j72xx_bandgap.c

207

int d02 = abs(s0 - s2);

drivers/thermal/k3_j72xx_bandgap.c

211

return (s0 + s1) / 2;

drivers/thermal/k3_j72xx_bandgap.c

214

return (s0 + s2) / 2;

drivers/thermal/k3_j72xx_bandgap.c

223

unsigned int dtemp, s0, s1, s2;

drivers/thermal/k3_j72xx_bandgap.c

235

s0 = readl(bgp->base + devdata->stat_offset) &

drivers/thermal/k3_j72xx_bandgap.c

241

dtemp = vtm_get_best_value(s0, s1, s2);

drivers/thermal/mediatek/lvts_thermal.c

132

#define VALID_SENSOR_MAP(s0, s1, s2, s3) \

drivers/thermal/mediatek/lvts_thermal.c

133

.valid_sensor_mask = (((s0) ? BIT(0) : 0) | \

include/linux/platform_data/cros_ec_commands.h

3215

float s0;

include/linux/platform_data/cros_ec_commands.h

3224

float s0;

include/video/newport.h

27

struct { volatile unsigned short s0, s1; } byshort;

kernel/rcu/srcutree.c

2036

unsigned long s0 = 0, s1 = 0;

kernel/rcu/srcutree.c

2075

s0 += c0;

kernel/rcu/srcutree.c

2078

pr_cont(" T(%ld,%ld)\n", s0, s1);

lib/crypto/curve25519-hacl64.c

228

u128 s0 = ((((((u128)(r0) * (r0))) + (((u128)(d4) * (r1))))) +

lib/crypto/curve25519-hacl64.c

238

tmp[0] = s0;

lib/crypto/sha256.c

71

W[I] = s1(W[I - 2]) + W[I - 7] + s0(W[I - 15]) + W[I - 16];

lib/crypto/sha512.c

95

s0(W[(j - 15) & 15]);

sound/pci/lx6464es/lx_core.c

838

u32 s0, s1, s2, s3;

sound/pci/lx6464es/lx_core.c

846

s0 = peak_map[chip->rmh.stat[0] & 0x0F];

sound/pci/lx6464es/lx_core.c

851

s0 = s1 = s2 = s3 = 0;

sound/pci/lx6464es/lx_core.c

853

r_levels[0] = s0;

tools/lib/bpf/bpf_tracing.h

380

#define __PT_FP_REG s0

tools/lib/bpf/usdt.c

1495

{ "s0", offsetof(struct user_regs_struct, s0) },

tools/testing/selftests/kvm/include/riscv/processor.h

86

unsigned long s0;

tools/testing/selftests/kvm/lib/riscv/processor.c

249

core.regs.s0 = vcpu_get_reg(vcpu, RISCV_CORE_REG(regs.s0));

tools/testing/selftests/kvm/lib/riscv/processor.c

284

core.regs.s0, core.regs.s1, core.regs.a0, core.regs.a1);

tools/testing/selftests/kvm/riscv/get-reg-list.c

303

case KVM_REG_RISCV_CORE_REG(regs.s0) ... KVM_REG_RISCV_CORE_REG(regs.s1):

tools/testing/selftests/kvm/riscv/get-reg-list.c

305

reg_off - KVM_REG_RISCV_CORE_REG(regs.s0));

tools/testing/selftests/kvm/riscv/get-reg-list.c

833

KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CORE | KVM_REG_RISCV_CORE_REG(regs.s0),