drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6087

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6088

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6089

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2740

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2743

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2749

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2752

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2863

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2866

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2872

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2875

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3023

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3024

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3028

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3029

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3045

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3046

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3050

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3051

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3171

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3172

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3355

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3358

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3364

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3367

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3574

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3577

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3583

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3586

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6872

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6874

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6876

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6878

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6882

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6884

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6886

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6888

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2143

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2144

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2148

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2149

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2165

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2166

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2170

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2171

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2223

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2226

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2232

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2235

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2265

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2268

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2274

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2277

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2344

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2345

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5286

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5288

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5290

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5292

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5296

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5298

reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5300

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5302

clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4089

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4090

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4091

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4093

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4094

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4095

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3249

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3250

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3251

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_INVALIDATE_ICACHE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3252

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3253

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3254

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3255

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3256

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE0_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3257

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_PIPE1_RESET, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3258

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3259

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3260

tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, enable ? 0 : 1);

drivers/gpu/drm/radeon/cik.c

3866

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

3870

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/cik.c

4947

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/cik.c

5151

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/evergreen.c

3022

WREG32(CP_ME_CNTL, cp_me);

drivers/gpu/drm/radeon/evergreen.c

3914

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/evergreen.c

4024

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/ni.c

1438

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1442

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/ni.c

1820

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/rv770.c

1084

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/si.c

3443

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/si.c

3447

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/si.c

3860

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/si.c

4029

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);