drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

20

int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int num);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

21

int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

23

void cn20k_free_mbox_memory(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

24

int cn20k_register_afpf_mbox_intr(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

25

int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

26

void cn20k_rvu_enable_mbox_intr(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

27

void cn20k_rvu_unregister_interrupts(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

30

void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h

31

void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

105

struct rvu *rvu = rvu_irq_data->rvu;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

109

intr = rvu_read64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

110

rvu_write64(rvu, BLKADDR_RVUM, rvu_irq_data->intr_status, intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

113

trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

118

rvu_irq_data->rvu_queue_work_hdlr(&rvu->afpf_wq_info,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

125

void cn20k_rvu_enable_mbox_intr(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

127

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

130

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

133

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

136

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

139

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

143

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(0),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

146

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(1),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

149

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(0),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

152

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(1),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

156

void cn20k_rvu_unregister_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

158

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(0),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

159

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

161

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(1),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

162

INTR_MASK(rvu->hw->total_pfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

164

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(0),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

165

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

167

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(1),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

168

INTR_MASK(rvu->hw->total_pfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

171

int cn20k_register_afpf_mbox_intr(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

177

irq_data = devm_kcalloc(rvu->dev, 4,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

19

struct rvu *rvu = rvu_irq_data->rvu;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

213

irq_data[vec].rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

216

sprintf(&rvu->irq_name[intr_vec * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

219

ret = request_irq(pci_irq_vector(rvu->pdev, intr_vec),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

220

rvu->ng_rvu->rvu_mbox_ops->pf_intr_handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

221

&rvu->irq_name[intr_vec * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

226

rvu->irq_allocated[intr_vec] = true;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

232

int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

243

bar = (u64)phys_to_virt((u64)rvu->ng_rvu->vf_mbox_addr->base);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

257

bar = (u64)phys_to_virt((u64)rvu->ng_rvu->pf_mbox_addr->base);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

26

intr = rvupf_read64(rvu, rvu_irq_data->intr_status);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

268

static int rvu_alloc_mbox_memory(struct rvu *rvu, int type,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

27

rvupf_write64(rvu, rvu_irq_data->intr_status, intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

288

err = qmem_alloc(rvu->dev, &mbox_addr, ndevs, mbox_size);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

294

rvu->ng_rvu->pf_mbox_addr = mbox_addr;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

297

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFX_ADDR(pf),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

30

trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

303

rvu->ng_rvu->vf_mbox_addr = mbox_addr;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

304

rvupf_write64(rvu, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr->iova);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

318

int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int ndevs)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

32

rvu_irq_data->afvf_queue_work_hdlr(&rvu->afvf_wq_info, rvu_irq_data->start,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

322

if (!is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

325

rvu->ng_rvu->rvu_mbox_ops = &cn20k_mbox_ops;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

328

rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_PF_VF_CFG, ilog2(MBOX_SIZE));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

331

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

335

return rvu_alloc_mbox_memory(rvu, type, ndevs, MBOX_SIZE);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

338

void cn20k_free_mbox_memory(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

340

if (!is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

343

qmem_free(rvu->dev, rvu->ng_rvu->pf_mbox_addr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

344

qmem_free(rvu->dev, rvu->ng_rvu->vf_mbox_addr);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

347

void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

349

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

350

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

351

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

352

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

357

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

358

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

359

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

360

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

363

void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

368

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

369

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

370

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

371

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

374

rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

375

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

38

int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start)

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

381

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

382

rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

383

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

384

rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

386

rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

387

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

388

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

391

int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

397

if (is_rvu_otx2(rvu) || is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

400

ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

402

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

405

err = qmem_alloc(rvu->dev, &pfvf->cq_ints_ctx, qints, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

409

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

413

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

416

err = qmem_alloc(rvu->dev, &pfvf->nix_qints_ctx, qints, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

420

rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

45

irq_data = devm_kcalloc(rvu->dev, 4,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

82

irq_data[vec].rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

84

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAF VFAF%d Mbox%d",

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

86

err = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

87

rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

88

&rvu->irq_name[offset * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

91

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c

95

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c

14

int rvu_mbox_handler_nix_cn20k_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c

18

return rvu_nix_aq_enq_inst(rvu, (struct nix_aq_enq_req *)req,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c

14

int rvu_mbox_handler_npa_cn20k_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c

18

return rvu_npa_aq_enq_inst(rvu, (struct npa_aq_enq_req *)req,

drivers/net/ethernet/marvell/octeontx2/af/mcs.h

150

void *rvu;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

100

pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

113

spin_lock(&rvu->mcs_intrq_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

114

list_add_tail(&qentry->node, &rvu->mcs_intrq_head);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

115

spin_unlock(&rvu->mcs_intrq_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

116

queue_work(rvu->mcs_intr_wq, &rvu->mcs_intr_work);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

121

static int mcs_notify_pfvf(struct mcs_intr_event *event, struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

126

pf = rvu_get_pf(rvu->pdev, event->pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

128

mutex_lock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

130

req = otx2_mbox_alloc_msg_mcs_intr_notify(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

132

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

142

otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

144

otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

146

otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

148

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

155

struct rvu *rvu = container_of(work, struct rvu, mcs_intr_work);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

161

spin_lock_irqsave(&rvu->mcs_intrq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

162

qentry = list_first_entry_or_null(&rvu->mcs_intrq_head,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

168

spin_unlock_irqrestore(&rvu->mcs_intrq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

174

mcs_notify_pfvf(event, rvu);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

179

int rvu_mbox_handler_mcs_intr_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

187

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

19

*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

194

pfvf = &mcs->vf[rvu_get_hwvf(rvu, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

196

pfvf = &mcs->pf[rvu_get_pf(rvu->pdev, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

204

int rvu_mbox_handler_mcs_get_hw_info(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

210

if (!rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

215

rsp->num_mcs_blks = rvu->mcs_blk_cnt;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

223

int rvu_mbox_handler_mcs_port_reset(struct rvu *rvu, struct mcs_port_reset_req *req,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

228

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

238

int rvu_mbox_handler_mcs_clear_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

24

&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

245

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

260

int rvu_mbox_handler_mcs_get_flowid_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

266

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

291

int rvu_mbox_handler_mcs_get_secy_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

296

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

319

int rvu_mbox_handler_mcs_get_sc_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

325

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

343

int rvu_mbox_handler_mcs_get_sa_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

349

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

36

void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

367

int rvu_mbox_handler_mcs_get_port_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

373

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

391

int rvu_mbox_handler_mcs_set_active_lmac(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

397

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

409

int rvu_mbox_handler_mcs_port_cfg_set(struct rvu *rvu, struct mcs_port_cfg_set_req *req,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

414

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

42

if (!rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

427

int rvu_mbox_handler_mcs_port_cfg_get(struct rvu *rvu, struct mcs_port_cfg_get_req *req,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

432

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

445

int rvu_mbox_handler_mcs_custom_tag_cfg_get(struct rvu *rvu, struct mcs_custom_tag_cfg_get_req *req,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

450

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

460

int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

466

if (rvu->mcs_blk_cnt > 1) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

467

for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

481

int rvu_mbox_handler_mcs_flowid_ena_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

487

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

495

int rvu_mbox_handler_mcs_pn_table_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

501

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

509

int rvu_mbox_handler_mcs_set_pn_threshold(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

51

if (rvu->mcs_blk_cnt > 1) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

515

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

525

int rvu_mbox_handler_mcs_rx_sc_sa_map_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

531

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

539

int rvu_mbox_handler_mcs_tx_sc_sa_map_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

545

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

555

int rvu_mbox_handler_mcs_sa_plcy_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

562

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

573

int rvu_mbox_handler_mcs_rx_sc_cam_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

579

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

587

int rvu_mbox_handler_mcs_secy_plcy_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

592

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

602

int rvu_mbox_handler_mcs_flowid_entry_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

609

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

629

int rvu_mbox_handler_mcs_free_resources(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

63

port = (rpm_id * rvu->hw->lmac_per_cgx) + lmac_id;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

638

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

648

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

675

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

679

int rvu_mbox_handler_mcs_alloc_resources(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

688

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

698

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

72

int rvu_mbox_handler_mcs_set_lmac_mode(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

756

dev_err(rvu->dev, "Failed to allocate the mcs resources for PCIFUNC:%d\n", pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

757

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

761

int rvu_mbox_handler_mcs_alloc_ctrl_pkt_rule(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

771

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

778

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

78

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

808

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

812

dev_err(rvu->dev, "Failed to allocate the mcs ctrl pkt rule for PCIFUNC:%d\n",

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

814

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

818

int rvu_mbox_handler_mcs_free_ctrl_pkt_rule(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

825

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

830

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

834

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

839

int rvu_mbox_handler_mcs_ctrl_pkt_rule_write(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

846

if (req->mcs_id >= rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

856

static void rvu_mcs_set_lmac_bmap(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

863

cgx = port / rvu->hw->lmac_per_cgx;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

864

lmac = port % rvu->hw->lmac_per_cgx;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

865

if (!is_lmac_valid(rvu_cgx_pdata(cgx, rvu), lmac))

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

872

int rvu_mcs_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

874

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

878

rvu->mcs_blk_cnt = mcs_get_blkcnt();

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

880

if (!rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

884

if (rvu->mcs_blk_cnt == 1) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

889

rvu_mcs_set_lmac_bmap(rvu);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

893

for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

899

mcs->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

914

INIT_LIST_HEAD(&rvu->mcs_intrq_head);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

915

INIT_WORK(&rvu->mcs_intr_work, mcs_intr_handler_task);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

916

rvu->mcs_intr_wq = alloc_workqueue("mcs_intr_wq", WQ_PERCPU, 0);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

917

if (!rvu->mcs_intr_wq) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

918

dev_err(rvu->dev, "mcs alloc workqueue failed\n");

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

925

void rvu_mcs_exit(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

927

if (!rvu->mcs_intr_wq)

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

93

struct rvu *rvu = mcs->rvu;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

930

destroy_workqueue(rvu->mcs_intr_wq);

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

931

rvu->mcs_intr_wq = NULL;

drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

98

pfvf = &mcs->vf[rvu_get_hwvf(rvu, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/npc.h

14

rvu_write64(rvu, blkaddr, \

drivers/net/ethernet/marvell/octeontx2/af/npc.h

18

rvu_write64(rvu, blkaddr, \

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

101

struct ptp *ptp = rvu->ptp;

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

103

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

367

void ptp_start(struct rvu *rvu, u64 sclk, u32 ext_clk_freq, u32 extts)

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

369

struct ptp *ptp = rvu->ptp;

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

388

if (is_tstmp_atomic_update_supported(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

619

int rvu_mbox_handler_ptp_op(struct rvu *rvu, struct ptp_req *req,

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

631

if (!rvu->ptp)

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

636

err = ptp_adjfine(rvu->ptp, req->scaled_ppm);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

639

err = ptp_get_clock(rvu->ptp, &rsp->clk);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

642

err = ptp_get_tstmp(rvu->ptp, &rsp->clk);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

645

err = ptp_set_thresh(rvu->ptp, req->thresh);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

648

err = ptp_pps_on(rvu->ptp, req->pps_on, req->period);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

651

ptp_atomic_adjtime(rvu->ptp, req->delta);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

654

ptp_atomic_update(rvu->ptp, (u64)req->clk);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

664

int rvu_mbox_handler_ptp_get_cap(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

667

if (!rvu->ptp)

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

670

if (is_tstmp_atomic_update_supported(rvu))

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

99

static bool is_tstmp_atomic_update_supported(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/ptp.h

26

struct rvu;

drivers/net/ethernet/marvell/octeontx2/af/ptp.h

29

void ptp_start(struct rvu *rvu, u64 sclk, u32 ext_clk_freq, u32 extts);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1002

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1023

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1027

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1037

cfg = rvu_read64(rvu, BLKADDR_TIM, TIM_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1049

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

105

reg = rvu->afreg_base + ((block << 28) | offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1053

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1059

err = rvu_setup_cpt_hw_resource(rvu, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1061

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1065

err = rvu_setup_cpt_hw_resource(rvu, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1067

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1073

rvu->pf = devm_kcalloc(rvu->dev, hw->total_pfs,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1075

if (!rvu->pf) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1076

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1081

rvu->hwvf = devm_kcalloc(rvu->dev, hw->total_vfs,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1083

if (!rvu->hwvf) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1084

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1089

mutex_init(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1091

rvu_fwdata_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1093

err = rvu_setup_msix_resources(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1095

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1106

block->fn_map = devm_kcalloc(rvu->dev, block->lf.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1116

rvu_scan_block(rvu, block);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1119

err = rvu_set_channels_base(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1123

err = rvu_npc_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1125

dev_err(rvu->dev, "%s: Failed to initialize npc\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1129

err = rvu_cgx_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1131

dev_err(rvu->dev, "%s: Failed to initialize cgx\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1135

err = rvu_npc_exact_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1137

dev_err(rvu->dev, "failed to initialize exact match table\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1142

rvu_setup_pfvf_macaddress(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1144

err = rvu_npa_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1146

dev_err(rvu->dev, "%s: Failed to initialize npa\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1150

rvu_get_lbk_bufsize(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1152

err = rvu_nix_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1154

dev_err(rvu->dev, "%s: Failed to initialize nix\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1158

err = rvu_sdp_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1160

dev_err(rvu->dev, "%s: Failed to initialize sdp\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1164

rvu_program_channels(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1165

cgx_start_linkup(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1167

rvu_block_bcast_xon(rvu, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1168

rvu_block_bcast_xon(rvu, BLKADDR_NIX1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1170

err = rvu_mcs_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1172

dev_err(rvu->dev, "%s: Failed to initialize mcs\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1176

err = rvu_cpt_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1178

dev_err(rvu->dev, "%s: Failed to initialize cpt\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1185

rvu_mcs_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1187

rvu_nix_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1189

rvu_npa_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1191

rvu_cgx_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1193

rvu_npc_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1194

rvu_fwdata_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1196

rvu_reset_msix(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1201

void rvu_aq_free(struct rvu *rvu, struct admin_queue *aq)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1206

qmem_free(rvu->dev, aq->inst);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1207

qmem_free(rvu->dev, aq->res);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1208

devm_kfree(rvu->dev, aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1211

int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1217

*ad_queue = devm_kzalloc(rvu->dev, sizeof(*aq), GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1223

err = qmem_alloc(rvu->dev, &aq->inst, qsize, inst_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1225

devm_kfree(rvu->dev, aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1230

err = qmem_alloc(rvu->dev, &aq->res, qsize, res_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1232

rvu_aq_free(rvu, aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1240

int rvu_mbox_handler_ready(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1243

if (rvu->fwdata) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1244

rsp->rclk_freq = rvu->fwdata->rclk;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1245

rsp->sclk_freq = rvu->fwdata->sclk;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1296

bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1300

if (!is_pf_func_valid(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1303

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1312

static int rvu_lookup_rsrc(struct rvu *rvu, struct rvu_block *block,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1318

rvu_write64(rvu, block->addr, block->lookup_reg, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1321

while (rvu_read64(rvu, block->addr, block->lookup_reg) & (1ULL << 13))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1324

val = rvu_read64(rvu, block->addr, block->lookup_reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1333

int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1336

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1350

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1353

if (!is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1387

static void rvu_detach_block(struct rvu *rvu, int pcifunc, int blktype)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1389

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1390

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1395

blkaddr = rvu_get_blkaddr(rvu, blktype, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1407

lf = rvu_lookup_rsrc(rvu, block, pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1413

rvu_npc_clear_ucast_entry(rvu, pcifunc, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1416

rvu_write64(rvu, blkaddr, block->lfcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1420

rvu_update_rsrc_map(rvu, pfvf, block,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1427

rvu_clear_msix_offset(rvu, pfvf, block, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1431

static int rvu_detach_rsrcs(struct rvu *rvu, struct rsrc_detach *detach,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1434

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1439

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1470

rvu_detach_block(rvu, pcifunc, block->type);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1473

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1477

int rvu_mbox_handler_detach_resources(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1481

return rvu_detach_rsrcs(rvu, detach, detach->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1484

int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1486

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1490

pf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1493

if (is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1495

} else if (is_lbk_vf(rvu, pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1502

if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1507

if (is_sdp_pfvf(rvu, pcifunc) && pf->sdp_info->node_id == 1)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1527

static int rvu_get_attach_blkaddr(struct rvu *rvu, int blktype,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1534

blkaddr = rvu_get_nix_blkaddr(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1538

return rvu_get_blkaddr(rvu, blktype, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1545

return rvu_get_blkaddr(rvu, blktype, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1548

if (is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1554

static int rvu_attach_block(struct rvu *rvu, int pcifunc, int blktype,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1557

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1558

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1567

blkaddr = rvu_get_attach_blkaddr(rvu, blktype, pcifunc, attach);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1582

rvu_write64(rvu, blkaddr, block->lfcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1584

rvu_update_rsrc_map(rvu, pfvf, block,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1588

rvu_set_msix_offset(rvu, pfvf, block, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1594

static int rvu_check_rsrc_availability(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1597

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1599

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1609

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1617

blkaddr = rvu_get_attach_blkaddr(rvu, BLKTYPE_NIX,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1626

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1636

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1652

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1667

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1680

blkaddr = rvu_get_attach_blkaddr(rvu, BLKTYPE_CPT,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1686

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1701

dev_info(rvu->dev, "Request for %s failed\n", block->name);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1705

static bool rvu_attach_from_same_block(struct rvu *rvu, int blktype,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1710

blkaddr = rvu_get_attach_blkaddr(rvu, blktype,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1715

num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, attach->hdr.pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1721

int rvu_mbox_handler_attach_resources(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1730

err = rvu_detach_rsrcs(rvu, NULL, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1735

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1738

err = rvu_check_rsrc_availability(rvu, attach, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1744

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_NPA, 1, attach);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1750

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_NIX, 1, attach);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1762

rvu_detach_block(rvu, pcifunc, BLKTYPE_SSO);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1763

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_SSO,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1771

rvu_detach_block(rvu, pcifunc, BLKTYPE_SSOW);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1772

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_SSOW,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1780

rvu_detach_block(rvu, pcifunc, BLKTYPE_TIM);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1781

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_TIM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1789

rvu_attach_from_same_block(rvu, BLKTYPE_CPT, attach))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1790

rvu_detach_block(rvu, pcifunc, BLKTYPE_CPT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1791

err = rvu_attach_block(rvu, pcifunc, BLKTYPE_CPT,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1797

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1802

rvu_detach_block(rvu, pcifunc, BLKTYPE_TIM);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1806

rvu_detach_block(rvu, pcifunc, BLKTYPE_SSOW);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1810

rvu_detach_block(rvu, pcifunc, BLKTYPE_SSO);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1814

rvu_detach_block(rvu, pcifunc, BLKTYPE_NIX);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1818

rvu_detach_block(rvu, pcifunc, BLKTYPE_NPA);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1821

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1825

static u16 rvu_get_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1840

static void rvu_set_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1846

cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1857

rvu_write64(rvu, block->addr, block->msixcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1865

static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1871

cfg = rvu_read64(rvu, block->addr, block->msixcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1876

rvu_write64(rvu, block->addr, block->msixcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1879

offset = rvu_get_msix_offset(rvu, pfvf, block->addr, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1889

int rvu_mbox_handler_msix_offset(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1892

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1897

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1902

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_NPA], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1903

rsp->npa_msixoff = rvu_get_msix_offset(rvu, pfvf, BLKADDR_NPA, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1906

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1910

lf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1911

rsp->nix_msixoff = rvu_get_msix_offset(rvu, pfvf, blkaddr, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1916

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSO], pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1918

rvu_get_msix_offset(rvu, pfvf, BLKADDR_SSO, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1923

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_SSOW], pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1925

rvu_get_msix_offset(rvu, pfvf, BLKADDR_SSOW, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1930

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_TIM], pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1932

rvu_get_msix_offset(rvu, pfvf, BLKADDR_TIM, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1937

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT0], pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1939

rvu_get_msix_offset(rvu, pfvf, BLKADDR_CPT0, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1944

lf = rvu_get_lf(rvu, &hw->block[BLKADDR_CPT1], pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1946

rvu_get_msix_offset(rvu, pfvf, BLKADDR_CPT1, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1952

int rvu_mbox_handler_free_rsrc_cnt(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1955

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1960

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1986

if (rvu->hw->cap.nix_fixed_txschq_mapping) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

1992

if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2016

if (!is_block_implemented(rvu->hw, BLKADDR_NIX1))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2040

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2045

int rvu_mbox_handler_vf_flr(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2053

cfg = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2054

RVU_PRIV_PFX_CFG(rvu_get_pf(rvu->pdev, pcifunc)));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2058

__rvu_flr_handler(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2065

int rvu_ndc_sync(struct rvu *rvu, int lfblkaddr, int lfidx, u64 lfoffset)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2068

rvu_write64(rvu, lfblkaddr, lfoffset, BIT_ULL(12) | lfidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2069

return rvu_poll_reg(rvu, lfblkaddr, lfoffset, BIT_ULL(12), true);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2072

int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2075

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2081

if (rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2087

int rvu_mbox_handler_set_vf_perm(struct rvu *rvu, struct set_vf_perm *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2090

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2097

if ((pcifunc & RVU_PFVF_FUNC_MASK) || is_lbk_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2101

pfvf = rvu_get_pfvf(rvu, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2110

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2113

nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2117

npc_enadis_default_mce_entry(rvu, target, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2120

npc_enadis_default_mce_entry(rvu, target, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2129

int rvu_mbox_handler_ndc_sync_op(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2133

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2139

lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2143

lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2148

err = rvu_ndc_sync(rvu, lfblkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2151

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2159

lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2163

lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2169

err = rvu_ndc_sync(rvu, lfblkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2172

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2178

err = rvu_ndc_sync(rvu, lfblkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2181

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2191

struct rvu *rvu = pci_get_drvdata(mbox->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2220

err = rvu_mbox_handler_ ## _fn_name(rvu, \

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2241

struct rvu *rvu = mwork->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

225

int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2251

mw = &rvu->afpf_wq_info;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2254

mw = &rvu->afvf_wq_info;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2271

if (req_hdr->sig && !(is_rvu_otx2(rvu) || is_cn20k(rvu->pdev))) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2273

rvu_write64(rvu, BLKADDR_NIX0, RVU_AF_BAR2_SEL,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2276

rvu_write64(rvu, BLKADDR_NIX0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2280

rvu_write64(rvu, BLKADDR_NIX0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2293

msg->pcifunc &= rvu_pcifunc_pf_mask(rvu->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2294

msg->pcifunc |= rvu_make_pcifunc(rvu->pdev, devid, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

230

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2310

dev_warn(rvu->dev, "Error %d when processing message %s (0x%x) from PF%d:VF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2312

msg->id, rvu_get_pf(rvu->pdev, msg->pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2315

dev_warn(rvu->dev, "Error %d when processing message %s (0x%x) from PF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2332

struct rvu *rvu = mwork->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2334

mutex_lock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2336

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

234

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2348

struct rvu *rvu = mwork->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2358

mw = &rvu->afpf_wq_info;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2361

mw = &rvu->afvf_wq_info;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2373

dev_warn(rvu->dev, "mbox up handler: num_msgs = 0\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2383

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2389

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

240

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2400

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2428

static int rvu_get_mbox_regions(struct rvu *rvu, void __iomem **mbox_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2431

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2439

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2440

return cn20k_rvu_get_mbox_regions(rvu, (void *)mbox_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2453

bar4 = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2458

bar4 = rvupf_read64(rvu, RVU_PF_VF_BAR4_ADDR);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2477

bar4 = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2480

bar4 = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2501

static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

253

int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2532

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2538

rvu->ng_rvu = ng_rvu_mbox;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2540

rvu->ng_rvu->rvu_mbox_ops = &rvu_mbox_ops;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2542

err = cn20k_rvu_mbox_init(rvu, type, num);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2546

mutex_init(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2559

reg_base = rvu->afreg_base;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2560

err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2568

reg_base = rvu->pfreg_base;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2569

err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2586

mw->mbox_wrk = devm_kcalloc(rvu->dev, num,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2593

mw->mbox_wrk_up = devm_kcalloc(rvu->dev, num,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2600

err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2605

err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2615

mwork->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2619

mwork->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2636

cn20k_free_mbox_memory(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2638

kfree(rvu->ng_rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2708

struct rvu *rvu = (struct rvu *)rvu_irq;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2711

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2713

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2715

trace_otx2_msg_interrupt(rvu->pdev, "PF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2720

rvu_queue_work(&rvu->afpf_wq_info, 0, rvu->hw->total_pfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2727

struct rvu *rvu = (struct rvu *)rvu_irq;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2728

int vfs = rvu->vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2736

intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(1));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2737

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2739

rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2743

intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2744

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2746

trace_otx2_msg_interrupt(rvu->pdev, "VF(s) to AF", intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2748

rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2753

static void rvu_enable_mbox_intr(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2755

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2757

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2758

cn20k_rvu_enable_mbox_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2763

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2767

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1S,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2771

static void rvu_blklf_teardown(struct rvu *rvu, u16 pcifunc, u8 blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2777

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2778

num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2783

lf = rvu_get_lf(rvu, block, pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2789

rvu_nix_lf_teardown(rvu, pcifunc, block->addr, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2791

rvu_npa_lf_teardown(rvu, pcifunc, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2794

rvu_cpt_lf_teardown(rvu, pcifunc, block->addr, lf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2797

err = rvu_lf_reset(rvu, block, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2799

dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2805

static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2807

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2808

rvu_npc_exact_reset(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2810

mutex_lock(&rvu->flr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2818

rvu_nix_flr_free_bpids(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2821

rvu_nix_mcast_flr_free_entries(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2823

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2824

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2825

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2826

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2827

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_TIM);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2828

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_SSOW);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2829

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_SSO);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2830

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NPA);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2831

rvu_reset_lmt_map_tbl(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2832

rvu_detach_rsrcs(rvu, NULL, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2837

rvu_npc_free_mcam_entries(rvu, pcifunc, -1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2838

rvu_mac_reset(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2840

if (rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2841

rvu_mcs_flr_handler(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2843

mutex_unlock(&rvu->flr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2846

static void rvu_afvf_flr_handler(struct rvu *rvu, int vf)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2851

__rvu_flr_handler(rvu, vf + 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2859

rvupf_write64(rvu, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2860

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2866

struct rvu *rvu = flrwork->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2871

pf = flrwork - rvu->flr_wrk;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2872

if (pf >= rvu->hw->total_pfs) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2873

rvu_afvf_flr_handler(rvu, pf - rvu->hw->total_pfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2877

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2879

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2882

__rvu_flr_handler(rvu, (pcifunc | (vf + 1)));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2884

__rvu_flr_handler(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2887

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, BIT_ULL(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2890

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2893

static void rvu_afvf_queue_flr_work(struct rvu *rvu, int start_vf, int numvfs)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

29

static void rvu_set_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2901

intr = rvupf_read64(rvu, RVU_PF_VFFLR_INTX(reg));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2909

rvupf_write64(rvu, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2910

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2912

dev = vf + start_vf + rvu->hw->total_pfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2913

queue_work(rvu->flr_wq, &rvu->flr_wrk[dev].work);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2919

struct rvu *rvu = (struct rvu *)rvu_irq;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2923

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2927

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2930

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2933

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2936

queue_work(rvu->flr_wq, &rvu->flr_wrk[pf].work);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

294

devnum = rvu_get_hwvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2941

rvu_afvf_queue_flr_work(rvu, 0, 64);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2942

if (rvu->vfs > 64)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2943

rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2948

static void rvu_me_handle_vfset(struct rvu *rvu, int idx, u64 intr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2958

rvupf_write64(rvu, RVU_PF_VFTRPENDX(idx), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2960

rvupf_write64(rvu, RVU_PF_VFME_INTX(idx), BIT_ULL(vf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2968

struct rvu *rvu = (struct rvu *)rvu_irq;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

297

devnum = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2972

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2975

intr = rvupf_read64(rvu, RVU_PF_VFME_INTX(vfset));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2977

rvu_me_handle_vfset(rvu, vfset, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2986

struct rvu *rvu = (struct rvu *)rvu_irq;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2990

intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2995

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

2998

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3001

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3009

static void rvu_unregister_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3013

rvu_cpt_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3015

if (!is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3017

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3018

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3020

cn20k_rvu_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3023

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3024

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3027

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1C,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3028

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3030

for (irq = 0; irq < rvu->num_vec; irq++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3031

if (rvu->irq_allocated[irq]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3032

free_irq(pci_irq_vector(rvu->pdev, irq), rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3033

rvu->irq_allocated[irq] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3037

pci_free_irq_vectors(rvu->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3038

rvu->num_vec = 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3041

static int rvu_afvf_msix_vectors_num_ok(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3043

struct rvu_pfvf *pfvf = &rvu->pf[0];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3046

pfvf = &rvu->pf[0];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3047

offset = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(0)) & 0x3ff;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3053

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

306

cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3061

static int rvu_register_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3065

rvu->num_vec = pci_msix_vec_count(rvu->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3067

rvu->irq_name = devm_kmalloc_array(rvu->dev, rvu->num_vec,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3069

if (!rvu->irq_name)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3072

rvu->irq_allocated = devm_kcalloc(rvu->dev, rvu->num_vec,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3074

if (!rvu->irq_allocated)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3078

ret = pci_alloc_irq_vectors(rvu->pdev, rvu->num_vec,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3079

rvu->num_vec, PCI_IRQ_MSIX);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3081

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3083

rvu->num_vec, ret);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3087

if (!is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3089

sprintf(&rvu->irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3092

(rvu->pdev, RVU_AF_INT_VEC_MBOX),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3093

rvu->ng_rvu->rvu_mbox_ops->pf_intr_handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3094

&rvu->irq_name[RVU_AF_INT_VEC_MBOX *

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3095

NAME_SIZE], rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3097

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

31

static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3102

rvu->irq_allocated[RVU_AF_INT_VEC_MBOX] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3104

ret = cn20k_register_afpf_mbox_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3106

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3113

rvu_enable_mbox_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3116

sprintf(&rvu->irq_name[RVU_AF_INT_VEC_PFFLR * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3118

ret = request_irq(pci_irq_vector(rvu->pdev, RVU_AF_INT_VEC_PFFLR),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3120

&rvu->irq_name[RVU_AF_INT_VEC_PFFLR * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3121

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3123

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3127

rvu->irq_allocated[RVU_AF_INT_VEC_PFFLR] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3130

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3131

RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3133

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3134

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3137

sprintf(&rvu->irq_name[RVU_AF_INT_VEC_PFME * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3139

ret = request_irq(pci_irq_vector(rvu->pdev, RVU_AF_INT_VEC_PFME),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

314

cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3141

&rvu->irq_name[RVU_AF_INT_VEC_PFME * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3142

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3144

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3147

rvu->irq_allocated[RVU_AF_INT_VEC_PFME] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3150

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3151

RVU_AF_PFTRPEND, INTR_MASK(rvu->hw->total_pfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3153

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3154

RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3156

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1S,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3157

INTR_MASK(rvu->hw->total_pfs) & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3159

if (!rvu_afvf_msix_vectors_num_ok(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3163

pf_vec_start = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3165

if (!is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3168

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF Mbox0");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3169

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3170

rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3171

&rvu->irq_name[offset * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3172

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3174

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3177

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3183

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF Mbox1");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3184

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3185

rvu->ng_rvu->rvu_mbox_ops->afvf_intr_handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3186

&rvu->irq_name[offset * NAME_SIZE],

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3187

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3189

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3192

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3194

ret = cn20k_register_afvf_mbox_intr(rvu, pf_vec_start);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3196

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3202

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF FLR0");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3203

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3205

&rvu->irq_name[offset * NAME_SIZE], rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3207

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3211

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3214

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF FLR1");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3215

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3217

&rvu->irq_name[offset * NAME_SIZE], rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3219

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

322

cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3223

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3227

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF ME0");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3228

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3230

&rvu->irq_name[offset * NAME_SIZE], rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3232

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3236

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3239

sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF ME1");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3240

ret = request_irq(pci_irq_vector(rvu->pdev, offset),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3242

&rvu->irq_name[offset * NAME_SIZE], rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3244

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3248

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3250

ret = rvu_cpt_register_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3257

rvu_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3261

static void rvu_flr_wq_destroy(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3263

if (rvu->flr_wq) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3264

destroy_workqueue(rvu->flr_wq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3265

rvu->flr_wq = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3269

static int rvu_flr_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3276

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3277

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3278

rvu_write64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3282

rvu->flr_wq = alloc_ordered_workqueue("rvu_afpf_flr",

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3284

if (!rvu->flr_wq)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3287

num_devs = rvu->hw->total_pfs + pci_sriov_get_totalvfs(rvu->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3288

rvu->flr_wrk = devm_kcalloc(rvu->dev, num_devs,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3290

if (!rvu->flr_wrk) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3291

destroy_workqueue(rvu->flr_wq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3296

rvu->flr_wrk[dev].rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3297

INIT_WORK(&rvu->flr_wrk[dev].work, rvu_flr_handler);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

33

static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

330

cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3300

mutex_init(&rvu->flr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3305

static void rvu_disable_afvf_intr(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3307

int vfs = rvu->vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3309

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3310

return cn20k_rvu_disable_afvf_intr(rvu, vfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3312

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3313

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3314

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3318

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(1),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3320

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3321

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3324

static void rvu_enable_afvf_intr(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3326

int vfs = rvu->vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3328

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3329

return cn20k_rvu_enable_afvf_intr(rvu, vfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3335

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3336

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3339

rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3340

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3341

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3347

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3348

rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(1),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3351

rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3352

rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3353

rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

336

if (is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3380

static int rvu_enable_sriov(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3382

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3386

if (!rvu_afvf_msix_vectors_num_ok(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3396

pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &rvu->vf_devid);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

341

static void rvu_update_rsrc_map(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3421

rvu->vfs = vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3423

err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3428

rvu_enable_afvf_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3434

rvu_disable_afvf_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3435

rvu_mbox_destroy(&rvu->afvf_wq_info);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3442

static void rvu_disable_sriov(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3444

rvu_disable_afvf_intr(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3445

rvu_mbox_destroy(&rvu->afvf_wq_info);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3446

pci_disable_sriov(rvu->pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3449

static void rvu_update_module_params(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3453

strscpy(rvu->mkex_pfl_name,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3455

strscpy(rvu->kpu_pfl_name,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3462

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3465

rvu = devm_kzalloc(dev, sizeof(*rvu), GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3466

if (!rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3469

rvu->hw = devm_kzalloc(dev, sizeof(struct rvu_hwinfo), GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3470

if (!rvu->hw) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3471

devm_kfree(dev, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3475

pci_set_drvdata(pdev, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3476

rvu->pdev = pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3477

rvu->dev = &pdev->dev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3499

rvu->ptp = ptp_get();

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

35

static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

350

dev_err(&rvu->pdev->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3500

if (IS_ERR(rvu->ptp)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3501

err = PTR_ERR(rvu->ptp);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3504

rvu->ptp = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3508

rvu->afreg_base = pcim_iomap(pdev, PCI_AF_REG_BAR_NUM, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3509

rvu->pfreg_base = pcim_iomap(pdev, PCI_PF_REG_BAR_NUM, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3510

if (!rvu->afreg_base || !rvu->pfreg_base) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3517

rvu_update_module_params(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3520

rvu_check_block_implemented(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3522

rvu_reset_all_blocks(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3524

rvu_setup_hw_capabilities(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3526

err = rvu_setup_hw_resources(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3531

err = rvu_mbox_init(rvu, &rvu->afpf_wq_info, TYPE_AFPF,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3532

rvu->hw->total_pfs, rvu_afpf_mbox_handler,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3539

err = rvu_flr_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3545

err = rvu_register_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3551

err = rvu_register_dl(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3557

rvu_setup_rvum_blk_revid(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3560

err = rvu_enable_sriov(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3567

rvu_dbg_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3569

mutex_init(&rvu->rswitch.switch_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3571

if (rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3572

ptp_start(rvu, rvu->fwdata->sclk, rvu->fwdata->ptp_ext_clk_rate,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3573

rvu->fwdata->ptp_ext_tstamp);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3576

rvu_alloc_cint_qint_mem(rvu, &rvu->pf[RVU_AFPF], BLKADDR_NIX0,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3577

(rvu->hw->block[BLKADDR_NIX0].lf.max));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3580

rvu_unregister_dl(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3582

rvu_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3584

rvu_flr_wq_destroy(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3586

rvu_mbox_destroy(&rvu->afpf_wq_info);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3588

rvu_cgx_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3589

rvu_fwdata_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

359

devnum = rvu_get_hwvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3590

rvu_mcs_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3591

rvu_reset_all_blocks(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3592

rvu_free_hw_resources(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3593

rvu_clear_rvum_blk_revid(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3595

ptp_put(rvu->ptp);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3602

devm_kfree(&pdev->dev, rvu->hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3603

devm_kfree(dev, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3609

struct rvu *rvu = pci_get_drvdata(pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3611

rvu_dbg_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3612

rvu_unregister_dl(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3613

rvu_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3614

rvu_flr_wq_destroy(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3615

rvu_cgx_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3616

rvu_fwdata_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3617

rvu_mcs_exit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3618

rvu_mbox_destroy(&rvu->afpf_wq_info);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3619

rvu_disable_sriov(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

362

devnum = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3620

rvu_reset_all_blocks(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3621

rvu_free_hw_resources(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3622

rvu_clear_rvum_blk_revid(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3623

ptp_put(rvu->ptp);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3628

devm_kfree(&pdev->dev, rvu->hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3629

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3630

cn20k_free_mbox_memory(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3631

kfree(rvu->ng_rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3632

devm_kfree(&pdev->dev, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3637

struct rvu *rvu = pci_get_drvdata(pdev);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3639

if (!rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

3642

rvu_clear_rvum_blk_revid(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

400

rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

403

void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

408

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

415

int rvu_get_hwvf(struct rvu *rvu, int pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

420

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

424

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

429

struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

433

return &rvu->hwvf[rvu_get_hwvf(rvu, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

435

return &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

438

static bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

443

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

444

if (pf >= rvu->hw->total_pfs)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

452

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

471

static void rvu_check_block_implemented(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

473

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

481

cfg = rvupf_read64(rvu, RVU_PF_BLOCK_ADDRX_DISC(blkid));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

487

static void rvu_setup_rvum_blk_revid(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

489

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

494

static void rvu_clear_rvum_blk_revid(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

496

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

500

int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

507

rvu_write64(rvu, block->addr, block->lfreset_reg, lf | BIT_ULL(12));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

508

err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12),

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

513

static void rvu_block_reset(struct rvu *rvu, int blkaddr, u64 rst_reg)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

515

struct rvu_block *block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

521

rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

522

err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

524

dev_err(rvu->dev, "HW block:%d reset timeout retrying again\n", blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

525

while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

530

static void rvu_reset_all_blocks(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

533

rvu_block_reset(rvu, BLKADDR_NPA, NPA_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

534

rvu_block_reset(rvu, BLKADDR_NIX0, NIX_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

535

rvu_block_reset(rvu, BLKADDR_NIX1, NIX_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

536

rvu_block_reset(rvu, BLKADDR_NPC, NPC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

537

rvu_block_reset(rvu, BLKADDR_SSO, SSO_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

538

rvu_block_reset(rvu, BLKADDR_TIM, TIM_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

539

rvu_block_reset(rvu, BLKADDR_CPT0, CPT_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

540

rvu_block_reset(rvu, BLKADDR_CPT1, CPT_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

541

rvu_block_reset(rvu, BLKADDR_NDC_NIX0_RX, NDC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

542

rvu_block_reset(rvu, BLKADDR_NDC_NIX0_TX, NDC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

543

rvu_block_reset(rvu, BLKADDR_NDC_NIX1_RX, NDC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

544

rvu_block_reset(rvu, BLKADDR_NDC_NIX1_TX, NDC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

545

rvu_block_reset(rvu, BLKADDR_NDC_NPA0, NDC_AF_BLK_RST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

548

static void rvu_scan_block(struct rvu *rvu, struct rvu_block *block)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

555

cfg = rvu_read64(rvu, block->addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

564

pfvf = rvu_get_pfvf(rvu, (cfg >> 8) & 0xFFFF);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

565

rvu_update_rsrc_map(rvu, pfvf, block,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

569

rvu_set_msix_offset(rvu, pfvf, block, lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

573

static void rvu_check_min_msix_vec(struct rvu *rvu, int nvecs, int pf, int vf)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

581

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

595

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

600

static int rvu_setup_msix_resources(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

602

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

61

static void rvu_setup_hw_capabilities(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

610

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

615

rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

617

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

619

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_MSIX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

621

rvu_check_min_msix_vec(rvu, pfvf->msix.max, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

629

pfvf->msix_lfmap = devm_kcalloc(rvu->dev, pfvf->msix.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

63

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

644

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

648

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

653

pfvf = &rvu->hwvf[hwvf + vf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

655

cfg = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

658

rvu_check_min_msix_vec(rvu, pfvf->msix.max, pf, vf + 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

666

devm_kcalloc(rvu->dev, pfvf->msix.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

675

cfg = rvu_read64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

680

rvu_write64(rvu, BLKADDR_RVUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

690

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

692

if (rvu->fwdata && rvu->fwdata->msixtr_base)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

693

phy_addr = rvu->fwdata->msixtr_base;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

695

phy_addr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

697

iova = dma_map_resource(rvu->dev, phy_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

701

if (dma_mapping_error(rvu->dev, iova))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

704

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

705

rvu->msix_base_iova = iova;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

706

rvu->msixtr_base_phy = phy_addr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

711

static void rvu_reset_msix(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

714

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

715

rvu->msixtr_base_phy);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

718

static void rvu_free_hw_resources(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

720

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

726

rvu_npa_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

727

rvu_npc_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

728

rvu_nix_freemem(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

73

hw->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

738

pfvf = &rvu->pf[id];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

743

pfvf = &rvu->hwvf[id];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

748

if (!rvu->msix_base_iova)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

75

if (is_rvu_pre_96xx_C0(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

750

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

752

dma_unmap_resource(rvu->dev, rvu->msix_base_iova,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

756

rvu_reset_msix(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

757

mutex_destroy(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

760

pfvf = &rvu->pf[RVU_AFPF];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

761

qmem_free(rvu->dev, pfvf->nix_qints_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

762

qmem_free(rvu->dev, pfvf->cq_ints_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

765

static void rvu_setup_pfvf_macaddress(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

767

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

777

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

780

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

781

if (rvu->fwdata && pf < PF_MACNUM_MAX) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

782

mac = &rvu->fwdata->pf_macs[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

794

rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

796

pfvf = &rvu->hwvf[hwvf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

797

if (rvu->fwdata && hwvf < VF_MACNUM_MAX) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

798

mac = &rvu->fwdata->vf_macs[hwvf];

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

811

static int rvu_fwdata_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

82

if (is_rvu_96xx_A0(rvu) || is_rvu_95xx_A0(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

822

rvu->fwdata = ioremap_wc(fwdbase, sizeof(struct rvu_fwdata));

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

823

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

825

if (!is_rvu_fwdata_valid(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

826

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

828

iounmap(rvu->fwdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

829

rvu->fwdata = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

834

dev_info(rvu->dev, "Unable to fetch 'fwdata' from firmware\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

838

static void rvu_fwdata_exit(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

840

if (rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

841

iounmap(rvu->fwdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

844

static int rvu_setup_nix_hw_resource(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

846

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

85

if (!is_rvu_pre_96xx_C0(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

856

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

867

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

869

rvu->nix_blkaddr[blkid] = blkaddr;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

873

static int rvu_setup_cpt_hw_resource(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

875

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

88

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

885

cfg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

897

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

902

static void rvu_get_lbk_bufsize(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

91

if (is_rvu_npc_hash_extract_en(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

920

rvu->hw->lbk_bufsize = FIELD_GET(LBK_CONST_BUF_SIZE, lbk_const);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

927

static int rvu_setup_hw_resources(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

929

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

935

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

940

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

941

rvu_apr_block_cn10k_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

947

cfg = rvu_read64(rvu, BLKADDR_NPA, NPA_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

958

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

962

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

968

err = rvu_setup_nix_hw_resource(rvu, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

970

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

975

err = rvu_setup_nix_hw_resource(rvu, BLKADDR_NIX1);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

977

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

98

int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero)

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

986

cfg = rvu_read64(rvu, BLKADDR_SSO, SSO_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

998

block->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1000

void rvu_npa_freemem(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1001

void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1002

int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1006

bool is_nixlf_attached(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1007

int rvu_nix_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1008

int rvu_nix_reserve_mark_format(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1010

void rvu_nix_freemem(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1011

int rvu_get_nixlf_count(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1012

void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1013

int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1014

int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1017

void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1020

int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1022

int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1024

int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1026

int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1030

int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1034

void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1036

void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1037

int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1039

int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1041

void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1042

int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1044

void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1045

int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1049

void rvu_npc_freemem(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1050

int rvu_npc_get_pkind(struct rvu *rvu, u16 pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1051

void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1052

int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1053

void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1055

void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1057

void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1059

void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1061

void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1063

void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1066

void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1068

void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1069

bool rvu_npc_enable_mcam_by_entry_index(struct rvu *rvu, int entry, int intf, bool enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1070

void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1071

void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1072

void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1073

void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1075

void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1077

void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1080

void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1083

void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1086

void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1090

bool is_npc_interface_valid(struct rvu *rvu, u8 intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1091

int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1092

int npc_flow_steering_init(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1095

void npc_mcam_enable_flows(struct rvu *rvu, u16 target);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1096

void npc_mcam_disable_flows(struct rvu *rvu, u16 target);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1097

void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1099

u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1101

void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1103

void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1106

int npc_config_cntr_default_entries(struct rvu *rvu, bool enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1107

bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1108

bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1109

u32 rvu_cgx_get_fifolen(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1110

void *rvu_first_cgx_pdata(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1111

int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1113

int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1114

int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1116

int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1117

void rvu_mac_reset(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1118

u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1119

void cgx_start_linkup(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1122

bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1124

int rvu_npc_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1125

int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1128

void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1129

bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1130

int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1131

void npc_mcam_rsrcs_deinit(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1134

int rvu_cpt_register_interrupts(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1135

void rvu_cpt_unregister_interrupts(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1136

int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1138

int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1139

int rvu_cpt_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1145

int rvu_set_channels_base(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1146

void rvu_program_channels(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1149

void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1152

void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1153

void rvu_apr_block_cn10k_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1156

void rvu_dbg_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1157

void rvu_dbg_exit(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1159

static inline void rvu_dbg_init(struct rvu *rvu) {}

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1160

static inline void rvu_dbg_exit(struct rvu *rvu) {}

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1163

int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1166

void rvu_switch_enable(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1167

void rvu_switch_disable(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1168

void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1169

void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1171

int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1174

int rvu_get_hwvf(struct rvu *rvu, int pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1177

int rvu_mcs_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1178

int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1179

void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

118

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1180

void rvu_mcs_exit(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1183

int rvu_rep_pf_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1184

int rvu_rep_install_mcam_rules(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1185

void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

1186

int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

144

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

397

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

461

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

483

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

673

static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

675

writeq(val, rvu->afreg_base + ((block << 28) | offset));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

678

static inline u64 rvu_read64(struct rvu *rvu, u64 block, u64 offset)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

680

return readq(rvu->afreg_base + ((block << 28) | offset));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

683

static inline void rvupf_write64(struct rvu *rvu, u64 offset, u64 val)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

685

writeq(val, rvu->pfreg_base + offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

688

static inline u64 rvupf_read64(struct rvu *rvu, u64 offset)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

690

return readq(rvu->pfreg_base + offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

693

static inline void rvu_bar2_sel_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

698

rvu_write64(rvu, block, offset, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

699

rvu_read64(rvu, block, offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

705

static inline bool is_rvu_pre_96xx_C0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

707

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

714

static inline bool is_rvu_96xx_A0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

716

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

721

static inline bool is_rvu_96xx_B0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

723

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

728

static inline bool is_rvu_95xx_A0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

730

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

746

static inline bool is_rvu_otx2(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

748

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

757

static inline bool is_cnf10ka_a0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

759

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

767

static inline bool is_cn10ka_a0(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

769

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

777

static inline bool is_cn10ka_a1(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

779

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

787

static inline bool is_cn10kb(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

789

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

810

static inline bool is_rvu_npc_hash_extract_en(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

814

npc_const3 = rvu_read64(rvu, BLKADDR_NPC, NPC_AF_CONST3);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

821

static inline u16 rvu_nix_chan_cgx(struct rvu *rvu, u8 cgxid,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

824

u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

826

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

831

return rvu->hw->cgx_chan_base +

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

835

static inline u16 rvu_nix_chan_lbk(struct rvu *rvu, u8 lbkid,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

838

u64 nix_const = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

840

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

845

return rvu->hw->lbk_chan_base + lbkid * lbk_chans + chan;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

848

static inline u16 rvu_nix_chan_sdp(struct rvu *rvu, u8 chan)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

850

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

858

static inline u16 rvu_nix_chan_cpt(struct rvu *rvu, u8 chan)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

860

return rvu->hw->cpt_chan_base + chan;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

863

static inline bool is_rvu_supports_nix1(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

865

struct pci_dev *pdev = rvu->pdev;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

877

static inline bool is_lbk_vf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

88

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

880

(rvu->vf_devid == RVU_LBK_VF_DEVID));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

894

static inline bool is_rvu_fwdata_valid(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

896

return (rvu->fwdata->header_magic == RVU_FWDATA_HEADER_MAGIC) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

897

(rvu->fwdata->version == RVU_FWDATA_VERSION);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

910

struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

911

void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

913

bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

914

int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

915

int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

916

int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

917

int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

919

int rvu_ndc_sync(struct rvu *rvu, int lfblkid, int lfidx, u64 lfoffset);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

920

int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

932

int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

934

void rvu_aq_free(struct rvu *rvu, struct admin_queue *aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

937

int rvu_sdp_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

938

bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

939

bool is_sdp_pf(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

940

bool is_sdp_vf(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

942

static inline bool is_rep_dev(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

944

if (rvu->rep_pcifunc && rvu->rep_pcifunc == pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

961

static inline bool is_pf_cgxmapped(struct rvu *rvu, u8 pf)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

963

return (pf >= PF_CGXMAP_BASE && pf <= rvu->cgx_mapped_pfs) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

964

!is_sdp_pf(rvu, rvu_make_pcifunc(rvu->pdev, pf, 0));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

973

static inline bool is_cgx_vf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

976

is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)));

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

980

int rvu_mbox_handler_ ## fn_name(struct rvu *, struct req *, struct rsp *);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

988

int rvu_cgx_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

989

int rvu_cgx_exit(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

990

void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

991

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

992

void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

993

int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

994

int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id, int index,

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

996

void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

999

int rvu_npa_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1001

int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1003

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1009

if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_FC))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1015

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1018

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1019

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1024

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1029

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1032

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1035

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1040

int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1044

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1053

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1056

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1057

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1061

err = rvu_cgx_cfg_pause_frm(rvu, req->hdr.pcifunc, req->tx_pause, req->rx_pause);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1068

int rvu_mbox_handler_cgx_get_phy_fec_stats(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1071

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1074

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1077

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1078

return cgx_get_phy_fec_stats(rvu_cgx_pdata(cgx_id, rvu), lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

108

static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1084

int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1094

if (!cgxd || !rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1097

pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1104

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1105

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1108

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

111

struct rvu_pfvf *pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1116

*stat += rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1119

*stat += rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1126

int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1131

if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1134

parent_pf = &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1135

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1137

mutex_lock(&rvu->cgx_cfg_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1156

err = rvu_cgx_config_rxtx(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1159

dev_err(rvu->dev, "Unable to %s CGX\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1169

mutex_unlock(&rvu->cgx_cfg_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

117

if (is_rvu_supports_nix1(rvu) && p2x == CMR_P2X_SEL_NIX1)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1173

int rvu_mbox_handler_cgx_set_fec_param(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1177

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1180

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1185

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1190

int rvu_mbox_handler_cgx_get_aux_link_info(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1193

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1196

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1199

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1202

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1204

if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1206

&rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id],

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

121

static int rvu_map_cgx_lmac_pf(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1210

&rvu->fwdata->cgx_fw_data[cgx_id][lmac_id],

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1216

int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1220

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1225

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1228

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

123

struct npc_pkind *pkind = &rvu->hw->pkind;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1231

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1232

cgxd = rvu_cgx_pdata(cgx_idx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1233

if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1234

linkmodes = &rvu->fwdata->cgx_fw_data_usx[cgx_idx][lmac];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1236

linkmodes = &rvu->fwdata->cgx_fw_data[cgx_idx][lmac];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

124

int cgx_cnt_max = rvu->cgx_cnt_max;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1243

int rvu_mbox_handler_cgx_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1246

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1249

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1252

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1254

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1255

return rvu_npc_exact_mac_addr_reset(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1260

int rvu_mbox_handler_cgx_mac_addr_update(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1264

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1267

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1270

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1271

return rvu_npc_exact_mac_addr_update(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1273

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1277

int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1280

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1289

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1292

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1293

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1298

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1303

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1306

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1309

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1314

int rvu_mbox_handler_cgx_prio_flow_ctrl_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1318

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1327

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1330

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1331

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1334

err = rvu_cgx_prio_flow_ctrl_cfg(rvu, req->hdr.pcifunc, req->tx_pause,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

134

if (cgx_cnt_max > 0xF || rvu->hw->lmac_per_cgx > 0xF)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1341

void rvu_mac_reset(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1343

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1348

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1351

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1352

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

1356

dev_err(rvu->dev, "Failed to reset MAC\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

141

size = (cgx_cnt_max * rvu->hw->lmac_per_cgx + 1) * sizeof(u8);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

142

rvu->pf2cgxlmac_map = devm_kmalloc(rvu->dev, size, GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

143

if (!rvu->pf2cgxlmac_map)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

147

memset(rvu->pf2cgxlmac_map, 0xFF, size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

150

rvu->cgxlmac2pf_map =

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

151

devm_kzalloc(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

152

cgx_cnt_max * rvu->hw->lmac_per_cgx * sizeof(u64),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

154

if (!rvu->cgxlmac2pf_map)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

157

rvu->cgx_mapped_pfs = 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

159

if (!rvu_cgx_pdata(cgx, rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

161

lmac_bmap = cgx_get_lmac_bmap(rvu_cgx_pdata(cgx, rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

162

for_each_set_bit(iter, &lmac_bmap, rvu->hw->lmac_per_cgx) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

165

lmac = cgx_get_lmacid(rvu_cgx_pdata(cgx, rvu),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

167

rvu->pf2cgxlmac_map[pf] = cgxlmac_id_to_bmap(cgx, lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

168

rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

171

rvu_map_cgx_nix_block(rvu, pf, cgx, lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

172

rvu->cgx_mapped_pfs++;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

173

rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

174

rvu->cgx_mapped_vfs += numvfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

181

static int rvu_cgx_send_link_info(int cgx_id, int lmac_id, struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

192

spin_lock_irqsave(&rvu->cgx_evq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

193

err = cgx_get_link_info(rvu_cgx_pdata(cgx_id, rvu), lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

201

list_add_tail(&qentry->evq_node, &rvu->cgx_evq_head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

203

spin_unlock_irqrestore(&rvu->cgx_evq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

206

queue_work(rvu->cgx_evh_wq, &rvu->cgx_evh_work);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

215

struct rvu *rvu = data;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

222

spin_lock(&rvu->cgx_evq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

223

list_add_tail(&qentry->evq_node, &rvu->cgx_evq_head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

224

spin_unlock(&rvu->cgx_evq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

227

queue_work(rvu->cgx_evh_wq, &rvu->cgx_evh_work);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

232

static void cgx_notify_pfs(struct cgx_link_event *event, struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

240

pfmap = cgxlmac_to_pfmap(rvu, event->cgx_id, event->lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

242

dev_err(rvu->dev, "CGX port%d:%d not mapped with PF\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

249

rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

253

if (!test_bit(pfid, &rvu->pf_notify_bmap)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

254

dev_info(rvu->dev, "cgx %d: lmac %d Link status %s\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

26

*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

260

mutex_lock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

263

msg = otx2_mbox_alloc_msg_cgx_link_event(rvu, pfid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

265

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

271

otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pfid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

273

otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pfid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

275

otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pfid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

277

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

283

struct rvu *rvu = container_of(work, struct rvu, cgx_evh_work);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

290

spin_lock_irqsave(&rvu->cgx_evq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

291

qentry = list_first_entry_or_null(&rvu->cgx_evq_head,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

296

spin_unlock_irqrestore(&rvu->cgx_evq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

303

cgx_notify_pfs(event, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

308

static int cgx_lmac_event_handler_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

31

&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

315

spin_lock_init(&rvu->cgx_evq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

316

INIT_LIST_HEAD(&rvu->cgx_evq_head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

317

INIT_WORK(&rvu->cgx_evh_work, cgx_evhandler_task);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

318

rvu->cgx_evh_wq = alloc_workqueue("rvu_evh_wq", WQ_PERCPU, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

319

if (!rvu->cgx_evh_wq) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

320

dev_err(rvu->dev, "alloc workqueue failed");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

325

cb.data = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

327

for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

328

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

332

for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

335

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

344

static void rvu_cgx_wq_destroy(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

346

if (rvu->cgx_evh_wq) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

347

destroy_workqueue(rvu->cgx_evh_wq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

348

rvu->cgx_evh_wq = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

352

int rvu_cgx_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

361

rvu->cgx_cnt_max = cgx_get_cgxcnt_max();

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

362

if (!rvu->cgx_cnt_max) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

363

dev_info(rvu->dev, "No CGX devices found!\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

367

rvu->cgx_idmap = devm_kzalloc(rvu->dev, rvu->cgx_cnt_max *

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

369

if (!rvu->cgx_idmap)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

37

trace_otx2_msg_alloc(rvu->pdev, _id, sizeof(*req), 0); \

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

373

for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

374

rvu->cgx_idmap[cgx] = cgx_get_pdata(cgx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

377

err = rvu_map_cgx_lmac_pf(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

382

for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

383

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

391

err = cgx_lmac_event_handler_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

395

mutex_init(&rvu->cgx_cfg_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

400

void cgx_start_linkup(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

408

for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

409

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

414

for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

419

for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

420

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

425

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

431

int rvu_cgx_exit(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

437

for (cgx = 0; cgx <= rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

438

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

44

bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

442

for_each_set_bit(lmac, &lmac_bmap, rvu->hw->lmac_per_cgx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

449

rvu_cgx_wq_destroy(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

457

inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

460

!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

465

void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

471

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

474

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

475

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

485

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

487

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

49

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

492

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

495

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

496

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

502

int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

504

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

509

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

512

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

513

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

52

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

527

void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

529

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

53

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

536

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

539

if (rvu_npc_exact_has_match_table(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

540

rvu_npc_exact_reset(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

544

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

563

int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

566

rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

570

int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

573

rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

577

static int rvu_lmac_get_stats(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

58

#define CGX_OFFSET(x) ((x) * rvu->hw->lmac_per_cgx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

580

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

587

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

590

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

591

cgxd = rvu_cgx_pdata(cgx_idx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

60

static u64 cgxlmac_to_pfmap(struct rvu *rvu, u8 cgx_id, u8 lmac_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

62

return rvu->cgxlmac2pf_map[CGX_OFFSET(cgx_id) + lmac_id];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

621

int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

624

return rvu_lmac_get_stats(rvu, req, (void *)rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

627

int rvu_mbox_handler_rpm_stats(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

630

return rvu_lmac_get_stats(rvu, req, (void *)rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

633

int rvu_mbox_handler_cgx_stats_rst(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

636

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

642

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

645

parent_pf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

65

int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

651

dev_info(rvu->dev, "CGX busy, could not reset statistics\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

655

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

656

cgxd = rvu_cgx_pdata(cgx_idx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

662

int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

666

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

671

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

673

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

675

cgxd = rvu_cgx_pdata(cgx_idx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

680

int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

684

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

688

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

69

pfmap = cgxlmac_to_pfmap(rvu, cgx_id, lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

691

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

692

return rvu_npc_exact_mac_addr_set(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

694

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

696

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

703

int rvu_mbox_handler_cgx_mac_addr_add(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

707

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

711

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

714

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

715

return rvu_npc_exact_mac_addr_add(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

717

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

727

int rvu_mbox_handler_cgx_mac_addr_del(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

731

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

734

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

737

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

738

return rvu_npc_exact_mac_addr_del(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

740

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

744

int rvu_mbox_handler_cgx_mac_max_entries_get(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

749

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

756

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

76

rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

761

if (rvu_npc_exact_has_match_table(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

762

rsp->max_dmac_filters = rvu_npc_exact_get_max_entries(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

766

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

771

int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

775

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

777

if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, req->hdr.pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

784

int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

788

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

791

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

795

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

796

return rvu_npc_exact_promisc_enable(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

798

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

804

int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

807

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

810

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

814

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

815

return rvu_npc_exact_promisc_disable(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

817

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

823

static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

825

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

826

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

831

if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_PTP))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

837

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

84

void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

840

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

841

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

849

if (npc_config_ts_kpuaction(rvu, pf, pcifunc, enable))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

855

rvu_mcs_ptp_cfg(rvu, cgx_id, lmac_id, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

859

int rvu_mbox_handler_cgx_ptp_rx_enable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

86

if (cgx_id >= rvu->cgx_cnt_max)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

862

if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, req->hdr.pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

865

return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

868

int rvu_mbox_handler_cgx_ptp_rx_disable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

871

return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

874

static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

876

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

879

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

882

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

885

set_bit(pf, &rvu->pf_notify_bmap);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

887

rvu_cgx_send_link_info(cgx_id, lmac_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

889

clear_bit(pf, &rvu->pf_notify_bmap);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

89

return rvu->cgx_idmap[cgx_id];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

895

int rvu_mbox_handler_cgx_start_linkevents(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

898

rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

902

int rvu_mbox_handler_cgx_stop_linkevents(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

905

rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

909

int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

915

pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

917

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

920

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

922

err = cgx_get_link_info(rvu_cgx_pdata(cgx_id, rvu), lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

927

int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

93

void *rvu_first_cgx_pdata(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

931

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

935

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

938

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_idx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

939

cgxd = rvu_cgx_pdata(cgx_idx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

945

u32 rvu_cgx_get_fifolen(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

947

void *cgxd = rvu_first_cgx_pdata(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

955

u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

960

cgxd = rvu_cgx_pdata(cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

971

static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

973

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

977

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

98

for (; first_enabled_cgx < rvu->cgx_cnt_max; first_enabled_cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

980

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

981

mac_ops = get_mac_ops(rvu_cgx_pdata(cgx_id, rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

983

return mac_ops->mac_lmac_intl_lbk(rvu_cgx_pdata(cgx_id, rvu),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

987

int rvu_mbox_handler_cgx_intlbk_enable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

99

cgxd = rvu_cgx_pdata(first_enabled_cgx, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

990

rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

994

int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

997

rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

105

pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

109

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

113

static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

115

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

121

tbl_idx = rvu_get_lmtst_tbl_index(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

122

err = lmtst_map_table_ops(rvu, tbl_idx, &val, LMT_TBL_OP_READ);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

124

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

138

err = lmtst_map_table_ops(rvu, tbl_idx, &lmt_addr, LMT_TBL_OP_WRITE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

140

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

148

int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

152

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

163

err = rvu_get_lmtaddr(rvu, req->hdr.pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

169

err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, lmt_addr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

184

pri_tbl_idx = rvu_get_lmtst_tbl_index(rvu, req->base_pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

187

err = lmtst_map_table_ops(rvu, pri_tbl_idx, &val,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

190

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

199

err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

209

tbl_idx = rvu_get_lmtst_tbl_index(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

210

err = lmtst_map_table_ops(rvu, tbl_idx + LMT_MAP_TBL_W1_OFF,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

213

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

23

static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

239

err = lmtst_map_table_ops(rvu, tbl_idx + LMT_MAP_TBL_W1_OFF,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

242

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

254

void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

256

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

260

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

265

tbl_idx = rvu_get_lmtst_tbl_index(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

270

err = lmtst_map_table_ops(rvu, tbl_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

274

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

283

err = lmtst_map_table_ops(rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

288

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

296

int rvu_set_channels_base(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

30

tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

300

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

304

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

308

nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

309

nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

31

cfg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

357

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

367

static void __rvu_lbk_set_chans(struct rvu *rvu, void __iomem *base,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

37

dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

370

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

383

static void rvu_lbk_set_channels(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

422

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

424

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

427

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

429

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

434

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

436

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

439

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_X2P,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

441

__rvu_lbk_set_chans(rvu, base, LBK_LINK_CFG_P2X,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

451

static void __rvu_nix_set_channels(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

453

u64 nix_const1 = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

454

u64 nix_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

456

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

468

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

472

rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

478

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

482

rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

488

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

492

rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

498

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

502

rvu_write64(rvu, blkaddr, NIX_AF_LINKX_CFG(nix_link), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

507

static void rvu_nix_set_channels(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

511

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

513

__rvu_nix_set_channels(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

514

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

533

static void rvu_rpm_set_channels(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

535

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

539

for (cgx = 0; cgx < rvu->cgx_cnt_max; cgx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

547

void rvu_program_channels(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

549

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

554

rvu_nix_set_channels(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

555

rvu_lbk_set_channels(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

556

rvu_rpm_set_channels(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

559

void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

567

rvu_write64(rvu, blkaddr, NIX_AF_VWQE_TIMER, 0x3FULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

57

rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

572

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

574

rvu_write64(rvu, blkaddr, NIX_AF_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

577

void rvu_apr_block_cn10k_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

58

rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CTL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

581

reg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

583

rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CFG, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

59

rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CTL, 0x00);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

67

static u32 rvu_get_lmtst_tbl_index(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

69

return ((rvu_get_pf(rvu->pdev, pcifunc) * LMT_MAX_VFS) +

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

73

static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

80

dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

84

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

85

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

86

pf = rvu_get_pf(rvu->pdev, pcifunc) & RVU_OTX2_PFVF_PF_MASK;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

89

rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

91

err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

93

dev_err(rvu->dev, "%s LMTLINE iova transulation failed\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

96

val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

98

dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1000

spin_lock_irqsave(&rvu->cpt_intr_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1007

spin_unlock_irqrestore(&rvu->cpt_intr_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1012

static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1015

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1031

cpt_rxc_time_cfg(rvu, &req, blkaddr, &prev);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1034

reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1043

dev_warn(rvu->dev, "Poll for RXC active count hits hard loop counter\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1047

reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1056

dev_warn(rvu->dev, "Poll for RXC zombie count hits hard loop counter\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1059

cpt_rxc_time_cfg(rvu, &prev, blkaddr, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

106

grp = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng)) & 0xFF;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1069

static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1077

rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1079

inprog = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

108

rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1082

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1085

qsize = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1088

inst_ptr = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

109

val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1098

dev_warn(rvu->dev, "TIMEOUT: CPT poll on pending instructions\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

110

rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val & ~1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1103

inprog = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1116

dev_warn(rvu->dev, "TIMEOUT: CPT poll on inflight count\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

112

rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), grp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1121

int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1125

if (is_cpt_pf(rvu, pcifunc) || is_cpt_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1126

cpt_rxc_teardown(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1128

mutex_lock(&rvu->alias_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

113

rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val | 1ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1131

rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1133

cpt_lf_disable_iqueue(rvu, blkaddr, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1135

rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1136

mutex_unlock(&rvu->alias_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1144

static int cpt_inline_inb_lf_cmd_send(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1147

int cpt_pf_num = rvu->cpt_pf_num;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

115

spin_lock(&rvu->cpt_intr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1160

res_daddr = dma_map_single(rvu->dev, res, CPT_RES_LEN,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1162

if (dma_mapping_error(rvu->dev, res_daddr)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1163

dev_err(rvu->dev, "DMA mapping failed for CPT result\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

117

val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(eng));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1171

otx2_mbox_alloc_msg_rsp(&rvu->afpf_wq_info.mbox_up,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1199

rvu_write64(rvu, nix_blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1202

otx2_mbox_msg_send(&rvu->afpf_wq_info.mbox_up, cpt_pf_num);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1203

rc = otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, cpt_pf_num);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1205

dev_warn(rvu->dev, "notification to pf %d failed\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

121

spin_unlock(&rvu->cpt_intr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1217

dev_warn(rvu->dev, "Poll for result hits hard loop counter\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1220

dma_unmap_single(rvu->dev, res_daddr, CPT_RES_LEN, DMA_BIDIRECTIONAL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

123

rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(vec), reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1230

int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1238

nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1242

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1250

rc = cpt_inline_inb_lf_cmd_send(rvu, blkaddr, nix_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1255

cpt_rxc_teardown(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1257

reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1260

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1262

num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1265

dev_warn(rvu->dev, "CPT LF is not configured\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1271

rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1274

cam_data = rvu_read64(rvu, blkaddr, CPT_AF_CTX_CAM_DATA(i));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1279

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1284

rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1287

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1294

int rvu_cpt_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1296

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1300

rvu->cpt_pf_num = get_cpt_pf_num(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1301

if (is_block_implemented(rvu->hw, BLKADDR_CPT0) && !is_rvu_otx2(rvu) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1302

!is_cn10kb(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1305

if (hw->cap.cpt_rxc && !is_cn10ka_a0(rvu) && !is_cn10ka_a1(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1309

reg_val = rvu_read64(rvu, BLKADDR_CPT0, CPT_AF_RXC_CFG1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1313

rvu_write64(rvu, BLKADDR_CPT0, CPT_AF_RXC_CFG1, reg_val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1316

spin_lock_init(&rvu->cpt_intr_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

146

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

150

reg = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

151

dev_err_ratelimited(rvu->dev, "Received CPTAF RVU irq : 0x%llx", reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

153

rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

160

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

164

reg = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

165

dev_err_ratelimited(rvu->dev, "Received CPTAF RAS irq : 0x%llx", reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

167

rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

175

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

178

ret = request_irq(pci_irq_vector(rvu->pdev, irq_offs), handler, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

181

dev_err(rvu->dev, "RVUAF: %s irq registration failed", name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

185

WARN_ON(rvu->irq_allocated[irq_offs]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

186

rvu->irq_allocated[irq_offs] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

192

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

198

max_engs = cpt_max_engines_get(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

199

flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

205

rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

209

rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

210

rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

214

if (rvu->irq_allocated[off + i]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

215

free_irq(pci_irq_vector(rvu->pdev, off + i), block);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

216

rvu->irq_allocated[off + i] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

220

static void cpt_unregister_interrupts(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

222

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

226

if (!is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

228

offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

230

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

235

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

240

rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

241

rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

242

rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

245

if (rvu->irq_allocated[offs + i]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

246

free_irq(pci_irq_vector(rvu->pdev, offs + i), block);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

247

rvu->irq_allocated[offs + i] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

251

void rvu_cpt_unregister_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

253

cpt_unregister_interrupts(rvu, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

254

cpt_unregister_interrupts(rvu, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

260

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

267

max_engs = cpt_max_engines_get(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

268

flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

271

sprintf(&rvu->irq_name[(off + i) * NAME_SIZE], "CPTAF FLT%d", i);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

285

flt_fn, &rvu->irq_name[(off + i) * NAME_SIZE]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

291

rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

303

rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

310

rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

314

rvu_cpt_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

318

static int cpt_register_interrupts(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

320

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

325

if (!is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

329

offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

331

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

336

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

340

sprintf(&rvu->irq_name[(offs + i) * NAME_SIZE], "CPTAF FLT%d", i);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

35

reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

350

flt_fn, &rvu->irq_name[(offs + i) * NAME_SIZE]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

353

rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

361

rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

368

rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

372

rvu_cpt_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

376

int rvu_cpt_register_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

380

ret = cpt_register_interrupts(rvu, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

384

return cpt_register_interrupts(rvu, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

387

static int get_cpt_pf_num(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

392

domain_nr = pci_domain_nr(rvu->pdev->bus);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

393

for (i = 0; i < rvu->hw->total_pfs; i++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

409

static bool is_cpt_pf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

411

int cpt_pf_num = rvu->cpt_pf_num;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

413

if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

421

static bool is_cpt_vf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

423

int cpt_pf_num = rvu->cpt_pf_num;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

425

if (rvu_get_pf(rvu->pdev, pcifunc) != cpt_pf_num)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

444

int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

461

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

462

num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

472

if (!is_pffunc_map_valid(rvu, req->nix_pf_func, BLKTYPE_NIX))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

481

if (!is_pffunc_map_valid(rvu, req->sso_pf_func, BLKTYPE_SSO))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

486

cptlf = rvu_get_lf(rvu, block, pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

492

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

499

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

50

static u16 cpt_max_engines_get(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

504

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

508

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

514

static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

520

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

521

num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

527

cptlf = rvu_get_lf(rvu, block, pcifunc, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

532

rvu_cpt_lf_teardown(rvu, pcifunc, blkaddr, cptlf, slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

535

err = rvu_lf_reset(rvu, block, cptlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

537

dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

545

int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

55

reg = rvu_read64(rvu, BLKADDR_CPT0, CPT_AF_CONSTANTS1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

550

ret = cpt_lf_free(rvu, req, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

554

if (is_block_implemented(rvu->hw, BLKADDR_CPT1))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

555

ret = cpt_lf_free(rvu, req, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

560

static int cpt_inline_ipsec_cfg_inbound(struct rvu *rvu, int blkaddr, u8 cptlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

567

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

576

if (sso_pf_func && !is_pffunc_map_valid(rvu, sso_pf_func, BLKTYPE_SSO))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

587

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

591

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

594

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

598

rvu_write64(rvu, blkaddr, CPT_AF_ECO, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

603

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

605

val |= (u64)rvu->hw->cpt_chan_base;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

607

rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

608

rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

614

static int cpt_inline_ipsec_cfg_outbound(struct rvu *rvu, int blkaddr, u8 cptlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

622

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

632

if (nix_pf_func && !is_pffunc_map_valid(rvu, nix_pf_func, BLKTYPE_NIX))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

640

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

644

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

646

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

648

nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, nix_pf_func);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

651

val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

653

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

659

int rvu_mbox_handler_cpt_inline_ipsec_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

66

static int cpt_10k_flt_nvecs_get(struct rvu *rvu, u16 max_engs)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

668

blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

673

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

675

cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

681

ret = cpt_inline_ipsec_cfg_inbound(rvu, blkaddr, cptlf, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

685

ret = cpt_inline_ipsec_cfg_outbound(rvu, blkaddr, cptlf, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

695

static bool validate_and_update_reg_offset(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

715

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

716

pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

723

lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr],

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

73

dev_warn_once(rvu->dev, "flt_vecs:%d exceeds the max vectors:%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

763

int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

775

if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

776

!is_cpt_vf(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

779

if (!validate_and_update_reg_offset(rvu, req, &offset))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

787

rvu_write64(rvu, blkaddr, offset, req->val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

789

rsp->val = rvu_read64(rvu, blkaddr, offset);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

794

static void get_ctx_pc(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

796

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

798

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

801

rsp->ctx_mis_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_MIS_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

802

rsp->ctx_hit_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_HIT_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

803

rsp->ctx_aop_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_AOP_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

804

rsp->ctx_aop_lat_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

806

rsp->ctx_ifetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_IFETCH_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

807

rsp->ctx_ifetch_lat_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

809

rsp->ctx_ffetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

810

rsp->ctx_ffetch_lat_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

812

rsp->ctx_wback_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

813

rsp->ctx_wback_lat_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

815

rsp->ctx_psh_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

816

rsp->ctx_psh_lat_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

818

rsp->ctx_err = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ERR);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

819

rsp->ctx_enc_id = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ENC_ID);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

820

rsp->ctx_flush_timer = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FLUSH_TIMER);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

821

rsp->x2p_link_cfg0 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

822

rsp->x2p_link_cfg1 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

826

rsp->rxc_time = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

827

rsp->rxc_time_cfg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

828

rsp->rxc_active_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

829

rsp->rxc_zombie_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

830

rsp->rxc_dfrg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

833

static void get_eng_sts(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

839

reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

84

struct rvu *rvu = block->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

858

int rvu_mbox_handler_cpt_sts(struct rvu *rvu, struct cpt_sts_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

868

if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

869

!is_cpt_vf(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

872

get_ctx_pc(rvu, rsp, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

875

get_eng_sts(rvu, rsp, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

878

rsp->inst_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

879

rsp->inst_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

880

rsp->rd_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

881

rsp->rd_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

882

rsp->rd_uc_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

883

rsp->active_cycles_pc = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

885

rsp->exe_err_info = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

886

rsp->cptclk_cnt = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

887

rsp->diag = rvu_read64(rvu, blkaddr, CPT_AF_DIAG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

899

static void cpt_rxc_time_cfg(struct rvu *rvu, struct cpt_rxc_time_cfg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

90

reg = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(vec));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

906

dfrg_reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

91

dev_err_ratelimited(rvu->dev, "Received CPTAF FLT%d irq : 0x%llx", vec, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

912

save->step = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

920

rvu_write64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG, req->step);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

921

rvu_write64(rvu, blkaddr, CPT_AF_RXC_DFRG, dfrg_reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

924

int rvu_mbox_handler_cpt_rxc_time_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

935

if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

936

!is_cpt_vf(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

939

cpt_rxc_time_cfg(rvu, req, blkaddr, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

944

int rvu_mbox_handler_cpt_ctx_cache_sync(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

947

return rvu_cpt_ctx_flush(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

950

int rvu_mbox_handler_cpt_lf_reset(struct rvu *rvu, struct cpt_lf_rst_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

959

blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

964

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

966

cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

969

ctl = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

970

ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

972

ret = rvu_lf_reset(rvu, block, cptlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

974

dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

977

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

978

rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

983

int rvu_mbox_handler_cpt_flt_eng_info(struct rvu *rvu, struct cpt_flt_eng_info_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

996

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

997

max_engs = cpt_max_engines_get(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

998

flt_vecs = cpt_10k_flt_nvecs_get(rvu, max_engs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1003

rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1006

qsize_id = rvu->rvu_dbg.npa_qsize_id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1011

qsize_id = rvu->rvu_dbg.nix_qsize_id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1024

if (!rvu_dbg_is_valid_lf(rvu, blkaddr, qsize_id, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1027

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1040

struct rvu *rvu = seqfile->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1062

dev_info(rvu->dev, "Use echo <%s-lf > qsize\n", blk_string);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1071

if (!rvu_dbg_is_valid_lf(rvu, blkaddr, lf, &pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1076

rvu->rvu_dbg.npa_qsize_id = lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1078

rvu->rvu_dbg.nix_qsize_id = lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1104

struct rvu *rvu = m->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1106

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1130

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1149

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1157

struct rvu *rvu = m->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1159

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1184

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1201

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1214

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1217

rvu = m->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1221

npalf = rvu->rvu_dbg.npa_aura_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1222

id = rvu->rvu_dbg.npa_aura_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1223

all = rvu->rvu_dbg.npa_aura_ctx.all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1227

npalf = rvu->rvu_dbg.npa_pool_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1228

id = rvu->rvu_dbg.npa_pool_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1229

all = rvu->rvu_dbg.npa_pool_ctx.all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1235

if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1238

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1281

rc = rvu_npa_aq_enq_inst(rvu, &aq_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1291

static int write_npa_ctx(struct rvu *rvu, bool all,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1298

if (!rvu_dbg_is_valid_lf(rvu, BLKADDR_NPA, npalf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1301

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1305

dev_warn(rvu->dev, "Aura context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1311

dev_warn(rvu->dev, "Pool context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1318

dev_warn(rvu->dev, "Invalid %s, valid range is 0-%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1326

rvu->rvu_dbg.npa_aura_ctx.lf = npalf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1327

rvu->rvu_dbg.npa_aura_ctx.id = id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1328

rvu->rvu_dbg.npa_aura_ctx.all = all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1332

rvu->rvu_dbg.npa_pool_ctx.lf = npalf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1333

rvu->rvu_dbg.npa_pool_ctx.id = id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1334

rvu->rvu_dbg.npa_pool_ctx.all = all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1387

struct rvu *rvu = seqfp->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1400

dev_info(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1405

ret = write_npa_ctx(rvu, all, npalf, id, ctype);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1447

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1451

rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1454

rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1458

req = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_REQ_PC

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1460

lat = rvu_read64(rvu, blk_addr, NDC_AF_PORTX_RTX_RWX_LAT_PC

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1462

out_req = rvu_read64(rvu, blk_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1465

cant_alloc = rvu_read64(rvu, blk_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1500

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1505

rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1508

rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1511

ndc_af_const = rvu_read64(rvu, blk_addr, NDC_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1516

(u64)rvu_read64(rvu, blk_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1519

(u64)rvu_read64(rvu, blk_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1661

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1672

cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1675

cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(p1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1678

cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(p2));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1681

cfg = rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(p3));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1693

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1699

nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1700

id = rvu->rvu_dbg.nix_tm_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1702

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1705

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1720

rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1738

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1748

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1751

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1753

dev_warn(rvu->dev, "SQ context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1757

rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1766

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1770

hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1774

rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1776

rvu_read64(rvu, blkaddr, NIX_AF_SMQX_STATUS(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1778

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1781

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1784

rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SHAPE(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1786

rvu_read64(rvu, blkaddr, NIX_AF_MDQX_CIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1788

rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1790

rvu_read64(rvu, blkaddr, NIX_AF_MDQX_SW_XOFF(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1792

rvu_read64(rvu, blkaddr, NIX_AF_MDQX_PARENT(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1798

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1801

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1804

rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SHAPE(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1806

rvu_read64(rvu, blkaddr, NIX_AF_TL4X_CIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1808

rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1810

rvu_read64(rvu, blkaddr, NIX_AF_TL4X_SW_XOFF(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1812

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1815

rvu_read64(rvu, blkaddr, NIX_AF_TL4X_PARENT(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1817

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1820

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1827

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1830

rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SHAPE(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1832

rvu_read64(rvu, blkaddr, NIX_AF_TL3X_CIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1834

rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1836

rvu_read64(rvu, blkaddr, NIX_AF_TL3X_SW_XOFF(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1838

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1841

rvu_read64(rvu, blkaddr, NIX_AF_TL3X_PARENT(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1843

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1846

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1849

link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1854

schq, rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1860

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1868

rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SHAPE(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1870

rvu_read64(rvu, blkaddr, NIX_AF_TL2X_CIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1872

rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1874

rvu_read64(rvu, blkaddr, NIX_AF_TL2X_SW_XOFF(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1876

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1879

rvu_read64(rvu, blkaddr, NIX_AF_TL2X_PARENT(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1881

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1884

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1887

link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1892

schq, rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1897

schq, link, rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1906

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1909

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1912

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1915

rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SHAPE(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1917

rvu_read64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1919

rvu_read64(rvu, blkaddr, NIX_AF_TL1X_SW_XOFF(schq)));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1921

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1924

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1927

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1931

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1934

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1937

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1940

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1943

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1946

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1949

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1952

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1962

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1968

nixlf = rvu->rvu_dbg.nix_tm_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1970

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1995

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2005

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2008

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2010

dev_warn(rvu->dev, "SQ context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2014

rvu->rvu_dbg.nix_tm_ctx.lf = nixlf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2025

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2027

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2032

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2180

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2182

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2249

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2251

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2266

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2288

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2304

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2315

nixlf = rvu->rvu_dbg.nix_cq_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2316

id = rvu->rvu_dbg.nix_cq_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2317

all = rvu->rvu_dbg.nix_cq_ctx.all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2321

nixlf = rvu->rvu_dbg.nix_sq_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2322

id = rvu->rvu_dbg.nix_sq_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2323

all = rvu->rvu_dbg.nix_sq_ctx.all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2327

nixlf = rvu->rvu_dbg.nix_rq_ctx.lf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2328

id = rvu->rvu_dbg.nix_rq_ctx.id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2329

all = rvu->rvu_dbg.nix_rq_ctx.all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2336

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2339

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2377

rc = rvu_mbox_handler_nix_aq_enq(rvu, &aq_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2387

static int write_nix_queue_ctx(struct rvu *rvu, bool all, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2396

if (!rvu_dbg_is_valid_lf(rvu, nix_hw->blkaddr, nixlf, &pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2399

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2403

dev_warn(rvu->dev, "SQ context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2409

dev_warn(rvu->dev, "RQ context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2415

dev_warn(rvu->dev, "CQ context is not initialized\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2422

dev_warn(rvu->dev, "Invalid %s_ctx valid range 0-%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2428

rvu->rvu_dbg.nix_cq_ctx.lf = nixlf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2429

rvu->rvu_dbg.nix_cq_ctx.id = id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2430

rvu->rvu_dbg.nix_cq_ctx.all = all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2434

rvu->rvu_dbg.nix_sq_ctx.lf = nixlf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2435

rvu->rvu_dbg.nix_sq_ctx.id = id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2436

rvu->rvu_dbg.nix_sq_ctx.all = all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2440

rvu->rvu_dbg.nix_rq_ctx.lf = nixlf;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2441

rvu->rvu_dbg.nix_rq_ctx.id = id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2442

rvu->rvu_dbg.nix_rq_ctx.all = all;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2457

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2487

dev_info(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2492

ret = write_nix_queue_ctx(rvu, all, nixlf, id, ctype,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2684

struct rvu *rvu = nix_hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2710

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2714

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2723

rvu_get_pf(rvu->pdev, pcifunc));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2726

rvu_get_pf(rvu->pdev, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2767

static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2771

if (!is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2775

rvu->rvu_dbg.nix = debugfs_create_dir("nix", rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2776

nix_hw = &rvu->hw->nix[0];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2778

rvu->rvu_dbg.nix = debugfs_create_dir("nix1",

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2779

rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2780

nix_hw = &rvu->hw->nix[1];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2783

debugfs_create_file("tm_tree", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2785

debugfs_create_file("tm_topo", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2787

debugfs_create_file("sq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2789

debugfs_create_file("rq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2791

debugfs_create_file("cq_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2793

debugfs_create_file("ndc_tx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2795

debugfs_create_file("ndc_rx_cache", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2797

debugfs_create_file("ndc_tx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2799

debugfs_create_file("ndc_rx_hits_miss", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2801

debugfs_create_file_aux_num("qsize", 0600, rvu->rvu_dbg.nix, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2803

debugfs_create_file("ingress_policer_ctx", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2805

debugfs_create_file("ingress_policer_rsrc", 0600, rvu->rvu_dbg.nix, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2809

static void rvu_dbg_npa_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2811

rvu->rvu_dbg.npa = debugfs_create_dir("npa", rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2813

debugfs_create_file("qsize", 0600, rvu->rvu_dbg.npa, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2815

debugfs_create_file("aura_ctx", 0600, rvu->rvu_dbg.npa, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2817

debugfs_create_file("pool_ctx", 0600, rvu->rvu_dbg.npa, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2820

if (is_cn20k(rvu->pdev)) /* NDC not appliable for cn20k */

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2822

debugfs_create_file("ndc_cache", 0600, rvu->rvu_dbg.npa, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2824

debugfs_create_file("ndc_hits_miss", 0600, rvu->rvu_dbg.npa, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2831

err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2841

err = rvu_cgx_nix_cuml_stats(rvu, cgxd, lmac_id, (idx), \

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2856

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2858

rvu = pci_get_drvdata(pci_get_device(PCI_VENDOR_ID_CAVIUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2860

if (!rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2925

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2942

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2973

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2977

rvu = pci_get_drvdata(pci_get_device(PCI_VENDOR_ID_CAVIUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2979

if (!rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

2982

pf = cgxlmac_to_pf(rvu, cgx_get_cgxid(cgxd), lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3031

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3034

rvu = pci_get_drvdata(pci_get_device(PCI_VENDOR_ID_CAVIUM,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3036

if (!rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3039

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3044

if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3045

fwdata = &rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3047

fwdata = &rvu->fwdata->cgx_fw_data[cgx_id][lmac_id];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3117

static void rvu_dbg_cgx_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3128

mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3132

rvu->rvu_dbg.cgx_root = debugfs_create_dir(mac_ops->name,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3133

rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3136

cgx = rvu_cgx_pdata(i, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3142

rvu->rvu_dbg.cgx = debugfs_create_dir(dname,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3143

rvu->rvu_dbg.cgx_root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3145

for_each_set_bit(lmac_id, &lmac_bmap, rvu->hw->lmac_per_cgx) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3148

rvu->rvu_dbg.lmac =

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3149

debugfs_create_dir(dname, rvu->rvu_dbg.cgx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3151

debugfs_create_file_aux_num("stats", 0600, rvu->rvu_dbg.lmac,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3154

rvu->rvu_dbg.lmac, cgx, lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3157

rvu->rvu_dbg.lmac, cgx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3167

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3171

rvu_npc_get_mcam_entry_alloc_info(rvu, pcifunc, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3173

rvu_npc_get_mcam_counter_alloc_info(rvu, pcifunc, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3180

rvu_get_pf(rvu->pdev, pcifunc));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3183

rvu_get_pf(rvu->pdev, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3198

struct rvu *rvu = filp->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3204

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3208

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3209

counters = rvu->hw->npc_counters;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3213

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3218

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_TX));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3245

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3246

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3249

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3252

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3266

struct rvu *rvu = filp->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3270

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3274

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3278

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3507

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3515

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3519

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3523

pf = rvu_get_pf(rvu->pdev, iter->owner);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3541

pf = rvu_get_pf(rvu->pdev, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3555

enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, iter->entry);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3562

hits = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(iter->cntr));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3577

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3582

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3662

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3665

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3669

rvu->hw->cap.npc_exact_match_enabled ? "enabled" : "disable");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3670

if (!rvu->hw->cap.npc_exact_match_enabled)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3699

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3706

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3707

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3709

field = &rvu->hw->mcam.rx_key_fields[NPC_CHAN];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3715

pcifunc = rvu_npc_exact_drop_rule_to_pcifunc(rvu, i);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3716

cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(i, 0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3719

cam1 = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3726

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3736

static void rvu_dbg_npc_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3738

rvu->rvu_dbg.npc = debugfs_create_dir("npc", rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3740

debugfs_create_file("mcam_info", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3742

debugfs_create_file("mcam_rules", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3745

debugfs_create_file("rx_miss_act_stats", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3748

if (!rvu->hw->cap.npc_exact_match_enabled)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3751

debugfs_create_file("exact_entries", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3754

debugfs_create_file("exact_info", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3757

debugfs_create_file("exact_drop_cnt", 0444, rvu->rvu_dbg.npc, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3768

struct rvu *rvu = ctx->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3772

reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3795

reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3833

struct rvu *rvu = ctx->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3838

reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3847

reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(e));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3850

reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_ACTIVE(e));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3853

reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(e));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3867

struct rvu *rvu = ctx->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3873

hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3880

reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(lf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3882

reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3884

reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_PTR_CTL(lf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3886

reg = rvu_read64(rvu, blkaddr, block->lfcfg_reg |

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3899

struct rvu *rvu = ctx->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3903

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3904

reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3906

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3907

reg1 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_EXE(1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3909

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_PSNX_LF(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3911

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3913

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3915

reg0 = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3926

struct rvu *rvu = ctx->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3930

reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3932

reg = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3934

reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3936

reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3938

reg = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3940

reg = rvu_read64(rvu, blkaddr, CPT_AF_ACTIVE_CYCLES_PC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3942

reg = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3950

static void rvu_dbg_cpt_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3954

if (!is_block_implemented(rvu->hw, blkaddr))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3958

rvu->rvu_dbg.cpt = debugfs_create_dir("cpt", rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3959

ctx = &rvu->rvu_dbg.cpt_ctx[0];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3961

ctx->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3963

rvu->rvu_dbg.cpt = debugfs_create_dir("cpt1",

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3964

rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3965

ctx = &rvu->rvu_dbg.cpt_ctx[1];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3967

ctx->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3970

debugfs_create_file("cpt_pc", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3972

debugfs_create_file("cpt_ae_sts", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3974

debugfs_create_file("cpt_se_sts", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3976

debugfs_create_file("cpt_ie_sts", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3978

debugfs_create_file("cpt_engines_info", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3980

debugfs_create_file("cpt_lfs_info", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3982

debugfs_create_file("cpt_err_info", 0600, rvu->rvu_dbg.cpt, ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3986

static const char *rvu_get_dbg_dir_name(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3988

if (is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3991

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3997

void rvu_dbg_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

3999

rvu->rvu_dbg.root = debugfs_create_dir(rvu_get_dbg_dir_name(rvu), NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4001

debugfs_create_file("rsrc_alloc", 0444, rvu->rvu_dbg.root, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4004

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4005

debugfs_create_file("lmtst_map_table", 0444, rvu->rvu_dbg.root,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4006

rvu, &rvu_dbg_lmtst_map_table_fops);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4008

debugfs_create_file("rvu_fwdata", 0444, rvu->rvu_dbg.root, rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4014

if (is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4015

debugfs_create_file("rvu_pf_cgx_map", 0444, rvu->rvu_dbg.root,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4016

rvu, &rvu_dbg_rvu_pf_cgx_map_fops);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4018

debugfs_create_file("rvu_pf_rpm_map", 0444, rvu->rvu_dbg.root,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4019

rvu, &rvu_dbg_rvu_pf_cgx_map_fops);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4022

rvu_dbg_npa_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4023

rvu_dbg_nix_init(rvu, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4025

rvu_dbg_nix_init(rvu, BLKADDR_NIX1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4026

rvu_dbg_cgx_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4027

rvu_dbg_npc_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4028

rvu_dbg_cpt_init(rvu, BLKADDR_CPT0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4029

rvu_dbg_cpt_init(rvu, BLKADDR_CPT1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4030

rvu_dbg_mcs_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4033

void rvu_dbg_exit(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

4035

debugfs_remove_recursive(rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

494

static void rvu_dbg_mcs_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

500

if (!rvu->mcs_blk_cnt)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

503

rvu->rvu_dbg.mcs_root = debugfs_create_dir("mcs", rvu->rvu_dbg.root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

505

for (i = 0; i < rvu->mcs_blk_cnt; i++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

509

rvu->rvu_dbg.mcs = debugfs_create_dir(dname,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

510

rvu->rvu_dbg.mcs_root);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

512

rvu->rvu_dbg.mcs_rx = debugfs_create_dir("rx_stats", rvu->rvu_dbg.mcs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

514

debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_rx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

517

debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_rx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

520

debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_rx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

523

debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_rx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

526

debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_rx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

529

rvu->rvu_dbg.mcs_tx = debugfs_create_dir("tx_stats", rvu->rvu_dbg.mcs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

531

debugfs_create_file("flowid", 0600, rvu->rvu_dbg.mcs_tx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

534

debugfs_create_file("secy", 0600, rvu->rvu_dbg.mcs_tx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

537

debugfs_create_file("sc", 0600, rvu->rvu_dbg.mcs_tx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

540

debugfs_create_file("sa", 0600, rvu->rvu_dbg.mcs_tx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

543

debugfs_create_file("port", 0600, rvu->rvu_dbg.mcs_tx, mcs,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

554

struct rvu *rvu = filp->private_data;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

573

tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

574

val = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

581

dev_err(rvu->dev, "Failed to setup lmt map table mapping!!\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

597

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

612

rvu_get_pf_numvfs(rvu, pf, &num_vfs, &hw_vfs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

680

static int get_max_column_width(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

691

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

692

for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

693

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

698

block = rvu->hw->block[index];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

719

struct rvu *rvu = filp->private_data;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

737

lf_str_size = get_max_column_width(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

747

if (strlen(rvu->hw->block[index].name)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

750

rvu->hw->block[index].name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

760

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

761

for (vf = 0; vf <= rvu->hw->total_vfs; vf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

764

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

781

block = rvu->hw->block[index];

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

822

struct rvu *rvu = filp->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

831

mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

837

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

838

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

847

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

848

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

855

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

860

rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

874

struct rvu *rvu = s->private;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

879

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

882

fwdata = rvu->fwdata;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

937

static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

943

hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

947

dev_warn(rvu->dev, "Invalid LF: valid range: 0-%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

954

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

998

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

100

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1002

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1011

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1012

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1024

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1028

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1033

rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1049

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

105

intr = rvu_read64(rvu, blkaddr, NIX_AF_GEN_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1064

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1066

dev_warn(rvu->dev, "Failed to create hw_npa_intr reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1074

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1076

dev_warn(rvu->dev, "Failed to create hw_npa_gen reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1084

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1086

dev_warn(rvu->dev, "Failed to create hw_npa_err reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

109

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1094

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1096

dev_warn(rvu->dev, "Failed to create hw_npa_ras reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

110

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1115

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1120

dev_warn(rvu->dev, "Failed to create npa reporter, err =%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1124

rvu_npa_register_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1132

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1150

rvu_npa_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1155

static int rvu_health_reporters_create(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1160

rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1168

static void rvu_health_reporters_destroy(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1172

if (!rvu->rvu_dl)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1175

rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1186

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1191

if (!rvu->hw->cap.nix_common_dwrr_mtu) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1204

nix_hw = get_nix_hw(rvu->hw, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1225

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1229

rvu_write64(rvu, BLKADDR_NIX0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1230

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM), dwrr_mtu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1240

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1243

if (!rvu->hw->cap.nix_common_dwrr_mtu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1246

dwrr_mtu = rvu_read64(rvu, BLKADDR_NIX0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1247

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM));

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1267

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1270

enabled = rvu_npc_exact_has_match_table(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1283

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1285

rvu_npc_exact_disable_feature(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1295

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

130

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1310

if (rvu_npc_exact_can_disable_feature(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1323

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1327

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1339

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

134

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1344

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

135

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1358

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1371

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1386

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1388

ctx->val.vbool = rvu->def_rule_cntr_en;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1398

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

140

intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1401

err = npc_config_cntr_default_entries(rvu, ctx->val.vbool);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1403

rvu->def_rule_cntr_en = ctx->val.vbool;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1413

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1415

ctx->val.vu16 = (u16)rvu_get_nixlf_count(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1425

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1429

npc_mcam_rsrcs_deinit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1430

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1432

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1434

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1437

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1438

npc_mcam_rsrcs_init(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

144

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1448

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

145

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1453

cfg = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1455

cfg = rvu_read64(rvu, BLKADDR_NIX1, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1461

mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1521

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1524

if (rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1527

rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1537

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1540

rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1548

rvu_switch_enable(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1550

rvu_switch_disable(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1564

int rvu_register_dl(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1571

rvu->dev);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1573

dev_warn(rvu->dev, "devlink_alloc failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1579

rvu_dl->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1580

rvu->rvu_dl = rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1582

err = rvu_health_reporters_create(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1584

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1591

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1597

if (!rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1603

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1616

rvu_health_reporters_destroy(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1621

void rvu_unregister_dl(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1623

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1631

if (rvu_npc_exact_has_match_table(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

1635

rvu_health_reporters_destroy(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

165

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

169

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

170

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

175

intr = rvu_read64(rvu, blkaddr, NIX_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

179

rvu_write64(rvu, blkaddr, NIX_AF_RAS, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

180

rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

186

static void rvu_nix_unregister_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

188

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

191

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

195

offs = rvu_read64(rvu, blkaddr, NIX_PRIV_AF_INT_CFG) & 0x3ff;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

199

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

200

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

201

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

202

rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

204

if (rvu->irq_allocated[offs + NIX_AF_INT_VEC_RVU]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

205

free_irq(pci_irq_vector(rvu->pdev, offs + NIX_AF_INT_VEC_RVU),

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

207

rvu->irq_allocated[offs + NIX_AF_INT_VEC_RVU] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

211

if (rvu->irq_allocated[offs + i]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

212

free_irq(pci_irq_vector(rvu->pdev, offs + i), rvu_dl);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

213

rvu->irq_allocated[offs + i] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

217

static int rvu_nix_register_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

222

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

227

base = rvu_read64(rvu, blkaddr, NIX_PRIV_AF_INT_CFG) & 0x3ff;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

229

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

235

rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_RVU,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

240

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

243

rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_GEN,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

248

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

251

rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_AF_ERR,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

256

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

259

rc = rvu_common_request_irq(rvu, base + NIX_AF_INT_VEC_POISON,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

264

rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

268

rvu_nix_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

29

static bool rvu_common_request_irq(struct rvu *rvu, int offset,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

32

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

35

sprintf(&rvu->irq_name[offset * NAME_SIZE], "%s", name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

36

rc = request_irq(pci_irq_vector(rvu->pdev, offset), fn, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

364

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

365

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

37

&rvu->irq_name[offset * NAME_SIZE], rvu_dl);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

377

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

381

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

386

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

39

dev_warn(rvu->dev, "Failed to register %s irq\n", name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

395

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

396

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

408

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

41

rvu->irq_allocated[offset] = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

412

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

417

rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

426

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

427

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

43

return rvu->irq_allocated[offset];

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

439

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

443

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

448

rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

457

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

458

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

470

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

474

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

479

rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

495

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

510

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

512

dev_warn(rvu->dev, "Failed to create hw_nix_intr reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

520

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

522

dev_warn(rvu->dev, "Failed to create hw_nix_gen reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

530

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

532

dev_warn(rvu->dev, "Failed to create hw_nix_err reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

540

rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

542

dev_warn(rvu->dev, "Failed to create hw_nix_ras reporter, err=%ld\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

561

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

566

dev_warn(rvu->dev, "Failed to create nix reporter, err =%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

570

rvu_nix_register_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

578

struct rvu *rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

596

rvu_nix_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

60

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

615

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

619

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

620

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

625

intr = rvu_read64(rvu, blkaddr, NPA_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

629

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

630

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

64

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

65

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

650

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

654

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

655

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

660

intr = rvu_read64(rvu, blkaddr, NPA_AF_GEN_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

664

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

665

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

685

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

689

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

690

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

694

intr = rvu_read64(rvu, blkaddr, NPA_AF_ERR_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

698

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

699

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

70

intr = rvu_read64(rvu, blkaddr, NIX_AF_RVU_INT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

719

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

723

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

724

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

729

intr = rvu_read64(rvu, blkaddr, NPA_AF_RAS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

733

rvu_write64(rvu, blkaddr, NPA_AF_RAS, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

734

rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

74

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT, intr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

740

static void rvu_npa_unregister_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

742

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

746

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

75

rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

750

reg = rvu_read64(rvu, blkaddr, NPA_PRIV_AF_INT_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

753

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

754

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

755

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

756

rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1C, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

759

if (rvu->irq_allocated[offs + i]) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

760

free_irq(pci_irq_vector(rvu->pdev, offs + i), rvu_dl);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

761

rvu->irq_allocated[offs + i] = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

765

static int rvu_npa_register_interrupts(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

770

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

775

base = rvu_read64(rvu, blkaddr, NPA_PRIV_AF_INT_CFG) & 0x3ff;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

777

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

783

rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_RVU,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

788

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

791

rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_GEN,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

796

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

799

rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_AF_ERR,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

804

rvu_write64(rvu, blkaddr, NPA_AF_ERR_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

807

rc = rvu_common_request_irq(rvu, base + NPA_AF_INT_VEC_POISON,

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

812

rvu_write64(rvu, blkaddr, NPA_AF_RAS_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

816

rvu_npa_unregister_interrupts(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

918

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

919

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

931

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

935

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

940

rvu_write64(rvu, blkaddr, NPA_AF_RVU_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

949

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

95

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

950

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

962

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

966

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

971

rvu_write64(rvu, blkaddr, NPA_AF_GEN_INT_ENA_W1S, ~0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

980

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

981

struct rvu_devlink *rvu_dl = rvu->rvu_dl;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

99

rvu = rvu_dl->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

993

struct rvu *rvu = devlink_health_reporter_priv(reporter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

997

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h

72

struct rvu *rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h

79

int rvu_register_dl(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h

80

void rvu_unregister_dl(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

100

if (rvu->nix_blkaddr[i] == blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1002

ret = rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX0_RX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1003

ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX0_TX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1004

ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX1_RX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1005

ret |= rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NIX1_TX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1007

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

101

return rvu->nix_blkaddr[i + 1];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1017

static void nix_get_aq_req_smq(struct rvu *rvu, struct nix_aq_enq_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1022

if (is_cn20k(rvu->pdev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1028

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1038

static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1042

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1058

dev_warn(rvu->dev, "%s: NIX AQ not initialized\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1062

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1063

nixlf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

108

bool is_nixlf_attached(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1090

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RSS_CFG(nixlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1096

cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

110

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1121

nix_get_aq_req_smq(rvu, req, &smq, &smq_mask);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1127

if (!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_SMQ,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

113

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

119

int rvu_get_nixlf_count(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1201

rc = nix_aq_enqueue_wait(rvu, block, &inst);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

124

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

126

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1275

static int rvu_nix_verify_aq_ctx(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

128

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1285

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1288

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

133

int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1332

int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1339

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1343

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1348

err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

135

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1355

err = rvu_nix_verify_aq_ctx(rvu, nix_hw, req, NIX_AQ_CTYPE_CQ);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

136

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1382

static int nix_lf_hwctx_disable(struct rvu *rvu, struct hwctx_disable_req *req)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1384

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

139

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1424

rc = rvu_nix_aq_enq_inst(rvu, &aq_req, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1427

dev_err(rvu->dev, "Failed to disable %s:%d context\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

143

*nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1436

static int nix_lf_hwctx_lockdown(struct rvu *rvu, struct nix_aq_enq_req *req)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1453

err = rvu_nix_aq_enq_inst(rvu, &lock_ctx_req, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1455

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1462

int rvu_mbox_handler_nix_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1468

err = rvu_nix_aq_enq_inst(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1470

err = nix_lf_hwctx_lockdown(rvu, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1475

int rvu_mbox_handler_nix_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1479

return rvu_nix_aq_enq_inst(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1483

int rvu_mbox_handler_nix_cn10k_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1487

return rvu_nix_aq_enq_inst(rvu, (struct nix_aq_enq_req *)req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1491

int rvu_mbox_handler_nix_hwctx_disable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1495

return nix_lf_hwctx_disable(rvu, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1498

int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1503

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1516

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1517

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1522

nixlf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

153

int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1531

if (!is_pffunc_map_valid(rvu, req->npa_func, BLKTYPE_NPA))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1540

if (!is_pffunc_map_valid(rvu, req->sso_func, BLKTYPE_SSO))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1558

err = rvu_lf_reset(rvu, block, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1560

dev_err(rvu->dev, "Failed to reset NIX%d LF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1565

ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1569

err = qmem_alloc(rvu->dev, &pfvf->rq_ctx, req->rq_cnt, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1577

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RQS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

158

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1582

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RQS_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1586

err = qmem_alloc(rvu->dev, &pfvf->sq_ctx, req->sq_cnt, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

159

*blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1594

rvu_write64(rvu, blkaddr, NIX_AF_LFX_SQS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1598

rvu_write64(rvu, blkaddr, NIX_AF_LFX_SQS_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1602

err = qmem_alloc(rvu->dev, &pfvf->cq_ctx, req->cq_cnt, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1610

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CQS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1614

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CQS_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1618

err = nixlf_rss_ctx_init(rvu, blkaddr, pfvf, nixlf, req->rss_sz,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1625

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1628

err = qmem_alloc(rvu->dev, &pfvf->cq_ints_ctx, qints, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

163

*nix_hw = get_nix_hw(rvu->hw, *blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1632

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1635

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_CFG(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1639

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1642

err = qmem_alloc(rvu->dev, &pfvf->nix_qints_ctx, qints, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1646

rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1648

rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_CFG(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1656

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1659

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1668

rvu_write64(rvu, blkaddr, NIX_AF_LFX_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1671

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1675

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1677

if (is_rep_dev(rvu, pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1683

intf = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1684

if (is_sdp_pfvf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1687

err = nix_interface_init(rvu, pcifunc, intf, nixlf, rsp,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1693

rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1696

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1703

nix_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1711

cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQ_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1720

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1724

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1734

int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1737

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1743

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1744

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1749

nixlf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1753

if (is_rep_dev(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1757

rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1759

rvu_npc_free_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1763

nix_free_tx_vtag_entries(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1765

nix_interface_deinit(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1769

err = rvu_lf_reset(rvu, block, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1771

dev_err(rvu->dev, "Failed to reset NIX%d LF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1776

nix_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1781

int rvu_mbox_handler_nix_mark_format_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1791

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1792

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1796

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1805

rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1807

dev_err(rvu->dev, "No mark_format_ctl for (pf:%d, vf:%d)",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1808

rvu_get_pf(rvu->pdev, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1819

handle_txschq_shaper_update(struct rvu *rvu, int blkaddr, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1871

oldval = rvu_read64(rvu, blkaddr, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1873

rvu_write64(rvu, blkaddr, reg, regval);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1879

rvu_write64(rvu, blkaddr, sw_xoff, 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1880

rvu_write64(rvu, blkaddr, reg, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1882

rvu_write64(rvu, blkaddr, sw_xoff, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1887

rvu_write64(rvu, blkaddr, sw_xoff, 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1893

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1899

dbgval = rvu_read64(rvu, blkaddr, md_debug0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1902

rvu_write64(rvu, blkaddr, reg, regval);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1904

rvu_write64(rvu, blkaddr, sw_xoff, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1908

static void nix_reset_tx_schedule(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1938

rvu_write64(rvu, blkaddr, tlx_parent, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1941

rvu_write64(rvu, blkaddr, tlx_schedule, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1947

static void nix_reset_tx_shaping(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1950

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1980

handle_txschq_shaper_update(rvu, blkaddr, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1983

handle_txschq_shaper_update(rvu, blkaddr, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1990

cfg = rvu_read64(rvu, blkaddr, cir_reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1991

rvu_write64(rvu, blkaddr, cir_reg, cfg & ~BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1995

cfg = rvu_read64(rvu, blkaddr, pir_reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1996

rvu_write64(rvu, blkaddr, pir_reg, cfg & ~BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

1999

static void nix_reset_tx_linkcfg(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

20

static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2002

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2011

rvu_write64(rvu, blkaddr, NIX_AF_TL4X_SDP_LINK_CFG(schq), 0x00);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2013

link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ?

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2020

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2024

static void nix_clear_tx_xoff(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2027

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2055

rvu_write64(rvu, blkaddr, reg, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2058

static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

206

struct rvu *rvu = hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2060

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2061

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2064

if (is_lbk_vf(rvu, pcifunc)) {/* LBK links */

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2066

} else if (is_pf_cgxmapped(rvu, pf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2067

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2075

static void nix_get_txschq_range(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2078

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2079

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

208

nix_blkaddr = rvu_get_next_nix_blkaddr(rvu, nix_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2082

if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2085

} else if (is_pf_cgxmapped(rvu, pf)) { /* CGX links */

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2095

static int nix_check_txschq_alloc_req(struct rvu *rvu, int lvl, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2099

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

21

static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2110

link = nix_get_tx_link(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

212

nix_blkaddr = rvu_get_next_nix_blkaddr(rvu, nix_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2121

nix_get_txschq_range(rvu, pcifunc, link, &start, &end);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2144

static void nix_txsch_alloc(struct rvu *rvu, struct nix_txsch *txsch,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2148

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2228

int rvu_mbox_handler_nix_txsch_alloc(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2232

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2242

rc = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2246

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2250

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2256

rc = nix_check_txschq_alloc_req(rvu, lvl, pcifunc, nix_hw, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2272

link = nix_get_tx_link(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2278

nix_get_txschq_range(rvu, pcifunc, link, &start, &end);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2284

nix_txsch_alloc(rvu, txsch, rsp, lvl, start, end);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2292

nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2293

nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2294

nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

23

static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2302

nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2303

nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2304

nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2310

rsp->link_cfg_lvl = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2317

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2321

static void nix_smq_flush_fill_ctx(struct rvu *rvu, int blkaddr, int smq,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2358

smq_tree_ctx->cir_val = rvu_read64(rvu, blkaddr, smq_tree_ctx->cir_off);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2360

smq_tree_ctx->pir_val = rvu_read64(rvu, blkaddr, smq_tree_ctx->pir_off);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2364

regval = rvu_read64(rvu, blkaddr, parent_off);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2370

static void nix_smq_flush_enadis_xoff(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2378

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2400

rvu_write64(rvu, blkaddr, regoff, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2402

rvu_write64(rvu, blkaddr, regoff, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2406

static void nix_smq_flush_enadis_rate(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2421

rvu_write64(rvu, blkaddr, cir_off, cir_val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2423

rvu_write64(rvu, blkaddr, pir_off, pir_val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2425

rvu_write64(rvu, blkaddr, cir_off, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2427

rvu_write64(rvu, blkaddr, pir_off, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2432

static int nix_smq_flush(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2437

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2443

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2445

cfg = rvu_read64(rvu, blkaddr, NIX_AF_MDQX_IN_MD_COUNT(smq));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2451

if (is_pf_cgxmapped(rvu, pf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2452

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2453

restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2461

nix_smq_flush_fill_ctx(rvu, blkaddr, smq, smq_flush_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2462

nix_smq_flush_enadis_xoff(rvu, blkaddr, smq_flush_ctx, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2463

nix_smq_flush_enadis_rate(rvu, blkaddr, smq_flush_ctx, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2468

rvu_cgx_enadis_rx_bp(rvu, pf, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2470

link_level = rvu_read64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL) & 0x01 ?

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2476

cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2478

rvu_write64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2481

for (i = 0; i < (rvu->hw->cgx_links + rvu->hw->lbk_links); i++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2482

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2488

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2493

cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2495

rvu_write64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2498

err = rvu_poll_reg(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

25

static int nix_setup_ipolicers(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2501

dev_info(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2506

for (i = 0; i < (rvu->hw->cgx_links + rvu->hw->lbk_links); i++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2509

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2512

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2517

nix_smq_flush_enadis_rate(rvu, blkaddr, smq_flush_ctx, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2518

nix_smq_flush_enadis_xoff(rvu, blkaddr, smq_flush_ctx, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2521

rvu_cgx_enadis_rx_bp(rvu, pf, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2524

rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2528

static int nix_txschq_free(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2531

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2536

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2540

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2544

nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2549

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2559

nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2560

nix_clear_tx_xoff(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2561

nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2564

nix_clear_tx_xoff(rvu, blkaddr, NIX_TXSCH_LVL_TL1,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2565

nix_get_tx_link(rvu, pcifunc));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2572

schq = nix_get_tx_link(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2585

nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2600

nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2605

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2607

err = rvu_ndc_sync(rvu, blkaddr, nixlf, NIX_AF_NDC_TX_SYNC);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2609

dev_err(rvu->dev, "NDC-TX sync failed for NIXLF %d\n", nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2614

static int nix_txschq_free_one(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2617

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2625

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2629

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2633

nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2645

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2656

nix_clear_tx_xoff(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2658

nix_reset_tx_linkcfg(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2659

nix_reset_tx_shaping(rvu, blkaddr, nixlf, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2665

nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2670

nix_reset_tx_schedule(rvu, blkaddr, lvl, schq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2675

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2678

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2682

int rvu_mbox_handler_nix_txsch_free(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2687

return nix_txschq_free(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2689

return nix_txschq_free_one(rvu, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2692

static bool is_txschq_hierarchy_valid(struct rvu *rvu, u16 pcifunc, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

27

static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2703

if (!is_valid_txschq(rvu, blkaddr, lvl, pcifunc, schq))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2709

!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL4, pcifunc, parent))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

271

static void nix_rx_sync(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2714

!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL3, pcifunc, parent))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2719

!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL2, pcifunc, parent))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2724

!is_valid_txschq(rvu, blkaddr, NIX_TXSCH_LVL_TL1, pcifunc, parent))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

276

rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

277

err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2771

static void nix_tl1_default_cfg(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2777

schq = nix_get_tx_link(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2782

rvu_write64(rvu, blkaddr, NIX_AF_TL1X_TOPOLOGY(schq),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2788

if (!rvu->hw->cap.nix_common_dwrr_mtu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2789

rvu_write64(rvu, blkaddr, NIX_AF_TL1X_SCHEDULE(schq),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

279

dev_err(rvu->dev, "SYNC1: NIX RX software sync failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2792

rvu_write64(rvu, blkaddr, NIX_AF_TL1X_SCHEDULE(schq),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2795

rvu_write64(rvu, blkaddr, NIX_AF_TL1X_CIR(schq), 0x00);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2804

static int nix_txschq_cfg_read(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2817

!is_valid_txschq(rvu, blkaddr, req->lvl, pcifunc, schq))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2819

rsp->regval[idx] = rvu_read64(rvu, blkaddr, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2826

void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2829

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2831

u8 pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2835

if (!is_pf_cgxmapped(rvu, pf) && !is_rep_dev(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2849

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2856

int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2861

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

287

rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2873

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2877

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

288

err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2882

return nix_txschq_cfg_read(rvu, nix_hw, blkaddr, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2889

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2891

nix_tl1_default_cfg(rvu, nix_hw, pcifunc, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2892

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

290

dev_err(rvu->dev, "SYNC2: NIX RX software sync failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2903

if (!is_txschq_hierarchy_valid(rvu, pcifunc, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2911

val = rvu_read64(rvu, blkaddr, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2916

handle_txschq_shaper_update(rvu, blkaddr, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2922

nixlf = rvu_get_lf(rvu, &hw->block[blkaddr],

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

293

static bool is_valid_txschq(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2940

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2943

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2952

nix_smq_flush(rvu, blkaddr, schq, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2955

rvu_write64(rvu, blkaddr, reg, regval);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

296

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2961

static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2979

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2984

static int nix_tx_vtag_free(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2987

struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2997

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

2999

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

30

static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3008

static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

301

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3014

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3018

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3028

nix_tx_vtag_free(rvu, blkaddr, pcifunc, index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3033

static int nix_tx_vtag_alloc(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3036

struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3058

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3060

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3066

static int nix_tx_vtag_decfg(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3069

struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3088

err = nix_tx_vtag_free(rvu, blkaddr, pcifunc, idx0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3094

err = nix_tx_vtag_free(rvu, blkaddr, pcifunc, idx1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

31

static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

310

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3101

static int nix_tx_vtag_cfg(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3105

struct nix_hw *nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3115

nix_tx_vtag_alloc(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

312

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3126

nix_tx_vtag_alloc(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3139

nix_tx_vtag_free(rvu, blkaddr, pcifunc, rsp->vtag0_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3144

int rvu_mbox_handler_nix_vtag_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3151

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3157

err = nix_rx_vtag_cfg(rvu, nixlf, blkaddr, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

316

if ((nix_get_tx_link(rvu, map_func) !=

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3167

return nix_tx_vtag_cfg(rvu, blkaddr, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

317

nix_get_tx_link(rvu, pcifunc)) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3170

return nix_tx_vtag_decfg(rvu, blkaddr, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3176

static int nix_blk_setup_mce(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

318

(rvu_get_pf(rvu->pdev, map_func) !=

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

319

rvu_get_pf(rvu->pdev, pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3198

err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, &aq_req, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3200

dev_err(rvu->dev, "Failed to setup Bcast MCE for PF%d:VF%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3201

rvu_get_pf(rvu->pdev, pcifunc),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3228

static int nix_update_ingress_mce_list_hw(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3250

err = nix_blk_setup_mce(rvu, nix_hw, idx - 1, NIX_AQ_INSTOP_WRITE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3264

err = nix_blk_setup_mce(rvu, nix_hw, idx, NIX_AQ_INSTOP_WRITE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3278

static void nix_update_egress_mce_list_hw(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3303

rvu_write64(rvu, nix_hw->blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

331

static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3317

rvu_write64(rvu, nix_hw->blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3325

static int nix_del_mce_list_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

334

struct rvu_pfvf *parent_pf, *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3357

return nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3359

nix_update_egress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

336

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3363

static int nix_add_mce_list_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3393

return nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3395

nix_update_egress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

34

static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

343

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

344

if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3450

int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3455

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3467

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3470

rvu_get_pf(rvu->pdev, pcifunc));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3474

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3487

npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3488

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, mcam_index, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

350

pfvf->cgx_lmac = rvu->pf2cgxlmac_map[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3501

err = nix_blk_setup_mce(rvu, nix_hw, idx, NIX_AQ_INSTOP_WRITE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3515

void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3518

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3522

!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

353

pkind = rvu_npc_get_pkind(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3530

pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3547

static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

355

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3551

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3552

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3557

if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3563

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3564

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3567

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3571

nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3575

nix_get_mce_list(rvu, pcifunc, type, &mce_list, &mce_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3580

err = nix_update_mce_list(rvu, pcifunc, mce_list,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

359

pfvf->rx_chan_base = rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3595

static int nix_setup_mce_tables(struct rvu *rvu, struct nix_hw *nix_hw)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3604

for (pf = 1; pf < (rvu->cgx_mapped_pfs + 1); pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3605

cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3612

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3632

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3639

err = nix_blk_setup_mce(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3647

err = nix_blk_setup_mce(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

365

cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3655

err = nix_blk_setup_mce(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

366

rvu_npc_set_pkind(rvu, pkind, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3666

static int nix_setup_mcast(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3669

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3672

size = (rvu_read64(rvu, blkaddr, NIX_AF_CONST3) >> 16) & 0x0F;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3690

err = qmem_alloc(rvu->dev, &mcast->mce_ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3698

rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BASE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3702

rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3706

size = rvu_read64(rvu, blkaddr, NIX_AF_MC_MIRROR_CONST) & 0xFFFF;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3707

err = qmem_alloc(rvu->dev, &mcast->mcast_buf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3715

rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_BASE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3721

rvu_write64(rvu, blkaddr, NIX_AF_RX_MCAST_BUF_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3729

return nix_setup_mce_tables(rvu, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3732

static int nix_setup_txvlan(struct rvu *rvu, struct nix_hw *nix_hw)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3744

vlan->entry2pfvf_map = devm_kcalloc(rvu->dev, vlan->rsrc.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3757

static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

378

if (rvu->hw->lbk_links > 1)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3786

cfg = rvu_read64(rvu, blkaddr, reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3795

txsch->pfvf_map = devm_kcalloc(rvu->dev, txsch->schq.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3804

if (rvu->hw->cap.nix_common_dwrr_mtu ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3805

rvu->hw->cap.nix_multiple_dwrr_mtu) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3806

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3807

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3809

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3810

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_LBK),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3812

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3813

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_SDP),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3820

int rvu_nix_reserve_mark_format(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3832

rvu_write64(rvu, blkaddr, NIX_AF_MARK_FORMATX_CTL(fmt_idx), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3838

static int nix_af_mark_format_setup(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3855

total = (rvu_read64(rvu, blkaddr, NIX_AF_PSE_CONST) & 0xFF00) >> 8;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3857

nix_hw->mark_format.cfg = devm_kcalloc(rvu->dev, total, sizeof(u32),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3862

rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfgs[i]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3864

dev_err(rvu->dev, "Err %d in setup mark format %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3871

static void rvu_get_lbk_link_max_frs(struct rvu *rvu, u16 *max_mtu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3874

if (rvu->hw->lbk_bufsize == 0x12000)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3880

static void rvu_get_lmac_link_max_frs(struct rvu *rvu, u16 *max_mtu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3882

int fifo_size = rvu_cgx_get_fifolen(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3893

int rvu_mbox_handler_nix_get_hw_info(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3900

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3904

if (is_lbk_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3905

rvu_get_lbk_link_max_frs(rvu, &rsp->max_mtu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3907

rvu_get_lmac_link_max_frs(rvu, &rsp->max_mtu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3911

if (!rvu->hw->cap.nix_common_dwrr_mtu &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3912

!rvu->hw->cap.nix_multiple_dwrr_mtu) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3921

dwrr_mtu = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3922

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_RPM));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3925

dwrr_mtu = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3926

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_SDP));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3929

dwrr_mtu = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3930

nix_get_dwrr_mtu_reg(rvu->hw, SMQ_LINK_TYPE_LBK));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3936

int rvu_mbox_handler_nix_stats_rst(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3943

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3948

stats = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3952

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, i), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

3956

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, i), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

404

pfvf->rx_chan_base = rvu_nix_chan_lbk(rvu, lbkid, vf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

406

rvu_nix_chan_lbk(rvu, lbkid, vf - 1) :

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

407

rvu_nix_chan_lbk(rvu, lbkid, vf + 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

412

rvu_npc_set_pkind(rvu, NPC_RX_LBK_PKIND, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

413

rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

420

parent_pf = &rvu->pf[rvu_get_pf(rvu->pdev, pcifunc)];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

423

dev_err(rvu->dev, "Invalid sdp_info pointer\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

427

req_chan_base = rvu_nix_chan_sdp(rvu, 0) + sdp_info->pf_srn +

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4306

static int reserve_flowkey_alg_idx(struct rvu *rvu, int blkaddr, u32 flow_cfg)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4312

hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4327

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4339

int rvu_mbox_handler_nix_rss_flowkey_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

434

if (req_chan_base < rvu_nix_chan_sdp(rvu, 0) ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4348

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

435

req_chan_end > rvu_nix_chan_sdp(rvu, 255)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4352

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4359

alg_idx = reserve_flowkey_alg_idx(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

436

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4365

rvu_npc_update_flowkey_alg_idx(rvu, pcifunc, nixlf, req->group,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4370

static int nix_rx_flowkey_alg_cfg(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4378

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4385

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4392

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4398

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4404

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4411

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4418

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

442

req_chan_base = rvu_nix_chan_sdp(rvu, 0) + sdp_info->pf_srn;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4425

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4432

rc = reserve_flowkey_alg_idx(rvu, blkaddr, flowkey_cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4439

int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4448

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4452

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4457

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4464

rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4473

int rvu_mbox_handler_nix_get_mac_addr(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4480

if (!is_nixlf_attached(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4483

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4490

int rvu_mbox_handler_nix_set_rx_mode(struct rvu *rvu, struct nix_rx_mode *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4498

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4503

nix_rx_multicast = rvu->hw->cap.nix_rx_multicast & pfvf->use_mce_list;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4507

dev_warn_ratelimited(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4517

err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

452

rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4523

err = nix_update_mce_rule(rvu, pcifunc, NIXLF_ALLMULTI_ENTRY,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4526

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4533

err = nix_update_mce_rule(rvu, pcifunc, NIXLF_PROMISC_ENTRY,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4536

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4545

rvu_npc_install_allmulti_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4549

rvu_npc_enable_allmulti_entry(rvu, pcifunc, nixlf, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4554

rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4559

rvu_npc_enable_promisc_entry(rvu, pcifunc, nixlf, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4564

static void nix_find_link_frs(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4567

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4574

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4583

rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4587

pfvf = &rvu->hwvf[hwvf + vf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4596

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4609

int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

461

rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4612

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4614

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4622

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4626

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4630

if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4631

rvu_get_lbk_link_max_frs(rvu, &max_mtu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4633

rvu_get_lmac_link_max_frs(rvu, &max_mtu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

465

err = nix_update_mce_rule(rvu, pcifunc, NIXLF_BCAST_ENTRY, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4650

if (is_pf_cgxmapped(rvu, pf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4652

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx, &lmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4656

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4658

} else if (is_rep_dev(rvu, pcifunc)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4666

nix_find_link_frs(rvu, req, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4668

cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

467

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4672

rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4677

int rvu_mbox_handler_nix_set_rx_cfg(struct rvu *rvu, struct nix_rx_cfg *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4683

err = nix_get_nixlf(rvu, req->hdr.pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4687

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4709

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4714

static u64 rvu_get_lbk_link_credits(struct rvu *rvu, u16 lbk_max_frs)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4719

static void nix_link_config(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4722

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

473

rvu_npc_install_bcast_match_entry(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4730

rvu_get_lbk_link_max_frs(rvu, &lbk_max_frs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4731

rvu_get_lmac_link_max_frs(rvu, &lmac_max_frs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4734

rvu_write64(rvu, blkaddr, NIX_AF_SDP_LINK_CREDIT, SDP_LINK_CREDIT);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4743

rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4748

rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4753

rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4767

lmac_cnt = cgx_get_lmac_cnt(rvu_cgx_pdata(cgx, rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4774

lmac_bmap = cgx_get_lmac_bmap(rvu_cgx_pdata(cgx, rvu));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4775

for_each_set_bit(iter, &lmac_bmap, rvu->hw->lmac_per_cgx) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4776

lmac_fifo_len = rvu_cgx_get_lmac_fifolen(rvu, cgx, iter);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4778

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4790

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4798

tx_credits = rvu_get_lbk_link_credits(rvu, lbk_max_frs);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4802

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4807

static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4813

rvu_write64(rvu, blkaddr, NIX_AF_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4814

rvu_read64(rvu, blkaddr, NIX_AF_CFG) | BIT_ULL(9));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4816

err = rvu_poll_reg(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4819

dev_err(rvu->dev, "NIX X2P bus calibration failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

482

static void nix_interface_deinit(struct rvu *rvu, u16 pcifunc, u8 nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4823

status = rvu_read64(rvu, blkaddr, NIX_AF_STATUS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4825

for (idx = 0; idx < rvu->cgx_cnt_max; idx++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4827

if (!rvu_cgx_pdata(idx, rvu) ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4830

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4837

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

484

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4843

rvu_write64(rvu, blkaddr, NIX_AF_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4844

rvu_read64(rvu, blkaddr, NIX_AF_CFG) & ~BIT_ULL(9));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4846

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4853

static int nix_aq_init(struct rvu *rvu, struct rvu_block *block)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4859

cfg = rvu_read64(rvu, block->addr, NIX_AF_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4862

rvu_write64(rvu, block->addr, NIX_AF_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4865

rvu_write64(rvu, block->addr, NIX_AF_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4869

cfg = rvu_read64(rvu, block->addr, NIX_AF_NDC_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4875

rvu_write64(rvu, block->addr, NIX_AF_NDC_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4881

err = rvu_aq_alloc(rvu, &block->aq,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4887

rvu_write64(rvu, block->addr, NIX_AF_AQ_CFG, AQ_SIZE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4888

rvu_write64(rvu, block->addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4893

static void rvu_nix_setup_capabilities(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4895

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4898

hw_const = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

491

err = nix_update_mce_rule(rvu, pcifunc, NIXLF_BCAST_ENTRY, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4918

static int rvu_nix_block_init(struct rvu *rvu, struct nix_hw *nix_hw)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4921

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4929

if (is_rvu_96xx_B0(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

493

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4934

rvu_write64(rvu, blkaddr, NIX_AF_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4935

rvu_read64(rvu, blkaddr, NIX_AF_CFG) | 0x40ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4939

rvu_write64(rvu, blkaddr, NIX_AF_PSE_CHANNEL_LEVEL, 0x01);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4947

cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQM_DBG_CTL_STATUS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4953

rvu_write64(rvu, blkaddr, NIX_AF_SQM_DBG_CTL_STATUS, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4955

ltdefs = rvu->kpu.lt_def;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4957

err = nix_calibrate_x2p(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4962

rvu_nix_setup_capabilities(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4965

err = nix_aq_init(rvu, block);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4970

rvu_write64(rvu, blkaddr, NIX_AF_CINT_DELAY, 0x0ULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4972

cfg = rvu_read64(rvu, blkaddr, NIX_AF_SEB_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4976

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4979

rvu_write64(rvu, blkaddr, NIX_AF_SEB_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4981

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4982

rvu_nix_block_cn10k_init(rvu, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4985

err = nix_setup_txschq(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4989

err = nix_setup_ipolicers(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

499

rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4993

err = nix_af_mark_format_setup(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4997

err = nix_setup_mcast(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5001

err = nix_setup_txvlan(rvu, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5005

err = nix_setup_bpids(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5010

nix_setup_lso(rvu, nix_hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5016

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OL2,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5019

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

502

rvu_cgx_disable_dmac_entries(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5022

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5025

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5028

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5031

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5034

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ITCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5037

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5040

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IUDP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5043

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OSCTP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5046

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ISCTP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5050

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5054

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5059

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_CST_APAD1,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

507

static int nix_setup_bpids(struct rvu *rvu, struct nix_hw *hw, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5070

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(0),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5076

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ET(1),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5084

err = nix_rx_flowkey_alg_cfg(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5094

nix_link_config(rvu, blkaddr, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5097

rvu_write64(rvu, blkaddr, NIX_AF_RX_CFG, BIT_ULL(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5102

int rvu_nix_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5104

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5109

hw->nix = devm_kcalloc(rvu->dev, MAX_NIX_BLKS, sizeof(struct nix_hw),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5114

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5117

nix_hw->rvu = rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5119

err = rvu_nix_block_init(rvu, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5122

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5129

static void rvu_nix_block_freemem(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

513

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5138

rvu_aq_free(rvu, block->aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5140

if (is_block_implemented(rvu->hw, blkaddr)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5141

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5152

nix_ipolicer_freemem(rvu, nix_hw);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5159

qmem_free(rvu->dev, mcast->mce_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5160

qmem_free(rvu->dev, mcast->mcast_buf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5165

void rvu_nix_freemem(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5167

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

517

bp->cgx_bpid_cnt = rvu->hw->cgx_links * NIX_BPIDS_PER_LMAC;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5171

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5174

rvu_nix_block_freemem(rvu, blkaddr, block);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5175

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5179

static void nix_mcast_update_action(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

518

bp->sdp_bpid_cnt = rvu->hw->sdp_links * FIELD_GET(NIX_CONST_SDP_CHANS, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5182

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5187

npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5189

*(u64 *)&rx_action = npc_get_mcam_action(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5193

npc_set_mcam_action(rvu, mcam, npc_blkaddr, elem->mcam_index,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5196

*(u64 *)&tx_action = npc_get_mcam_action(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5200

npc_set_mcam_action(rvu, mcam, npc_blkaddr, elem->mcam_index,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5205

static void nix_mcast_update_mce_entry(struct rvu *rvu, u16 pcifunc, u8 is_active)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5212

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5213

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5237

nix_update_ingress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5239

nix_update_egress_mce_list_hw(rvu, nix_hw, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5242

nix_mcast_update_action(rvu, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5247

int rvu_mbox_handler_nix_lf_start_rx(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5254

err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5259

nix_mcast_update_mce_entry(rvu, pcifunc, 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5261

rvu_npc_enable_default_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5263

npc_mcam_enable_flows(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5265

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5268

rvu_switch_update_rules(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

527

bp->fn_map = devm_kcalloc(rvu->dev, bp->bpids.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5270

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5271

if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5272

rvu_rep_notify_pfvf_state(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5274

return rvu_cgx_start_stop_io(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5277

int rvu_mbox_handler_nix_lf_stop_rx(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5284

err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5288

rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5290

nix_mcast_update_mce_entry(rvu, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5293

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5296

err = rvu_cgx_start_stop_io(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5300

rvu_switch_update_rules(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5301

rvu_cgx_tx_enable(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5303

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5304

if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5305

rvu_rep_notify_pfvf_state(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5311

void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5313

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5315

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

532

bp->intf_map = devm_kcalloc(rvu->dev, bp->bpids.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5325

rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5326

rvu_npc_free_mcam_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5327

nix_interface_deinit(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5328

nix_rx_sync(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5329

nix_txschq_free(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5333

if (is_pf_cgxmapped(rvu, pf) && rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5334

rvu_rep_notify_pfvf_state(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5336

rvu_cgx_start_stop_io(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5340

err = nix_lf_hwctx_disable(rvu, &ctx_req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5342

dev_err(rvu->dev, "SQ ctx disable failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5347

err = nix_lf_hwctx_disable(rvu, &ctx_req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5349

dev_err(rvu->dev, "RQ ctx disable failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5354

err = nix_lf_hwctx_disable(rvu, &ctx_req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5356

dev_err(rvu->dev, "CQ ctx disable failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5360

rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5365

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5366

cgxd = rvu_cgx_pdata(cgx_id, rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

537

bp->ref_cnt = devm_kcalloc(rvu->dev, bp->bpids.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5370

if (npc_config_ts_kpuaction(rvu, pf, pcifunc, false))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5371

dev_err(rvu->dev, "NPC config for PTP failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5376

rvu_cgx_prio_flow_ctrl_cfg(rvu, pcifunc, 0, 0, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5379

rvu_cgx_cfg_pause_frm(rvu, pcifunc, 0, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5381

nix_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5383

nix_free_all_bandprof(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5385

sa_base = rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(nixlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5387

err = rvu_cpt_ctx_flush(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5389

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5396

static int rvu_nix_lf_ptp_tx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5398

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5404

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5405

if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_PTP))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5408

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5413

nixlf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5417

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5424

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5429

int rvu_mbox_handler_nix_lf_ptp_tx_enable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5432

return rvu_nix_lf_ptp_tx_cfg(rvu, req->hdr.pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5435

int rvu_mbox_handler_nix_lf_ptp_tx_disable(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5438

return rvu_nix_lf_ptp_tx_cfg(rvu, req->hdr.pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5441

int rvu_mbox_handler_nix_lso_format_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

545

void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5451

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5452

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5456

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5463

reg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5485

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5505

static void nix_inline_ipsec_cfg(struct rvu *rvu, struct nix_inline_ipsec_cfg *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

551

if (!is_lbk_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5515

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5524

rvu_write64(rvu, blkaddr, NIX_AF_RX_IPSEC_GEN_CFG, val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5531

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5537

rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_INST_QSEL(cpt_idx),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

554

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5541

val = rvu_read64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5543

rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5549

rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5551

rvu_write64(rvu, blkaddr, NIX_AF_RX_IPSEC_GEN_CFG, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5552

rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_INST_QSEL(cpt_idx),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5554

val = rvu_read64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5556

rvu_write64(rvu, blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5561

int rvu_mbox_handler_nix_inline_ipsec_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5565

if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5568

nix_inline_ipsec_cfg(rvu, req, BLKADDR_NIX0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5569

if (is_block_implemented(rvu->hw, BLKADDR_CPT1))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5570

nix_inline_ipsec_cfg(rvu, req, BLKADDR_NIX1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5575

int rvu_mbox_handler_nix_read_inline_ipsec_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5582

if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5585

val = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_RX_IPSEC_GEN_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5591

val = rvu_read64(rvu, BLKADDR_NIX0, NIX_AF_RX_CPTX_CREDIT(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5599

int rvu_mbox_handler_nix_inline_ipsec_lf_cfg(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

560

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5606

if (!is_block_implemented(rvu->hw, BLKADDR_CPT0))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5609

err = nix_get_nixlf(rvu, req->hdr.pcifunc, &lf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5623

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG0(lf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5628

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG1(lf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5631

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(lf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5634

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG0(lf), 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5635

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_CFG1(lf), 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5636

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_IPSEC_SA_BASE(lf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5653

static void nix_config_rx_pkt_policer_precolor(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5658

memcpy(ltdefs, rvu->kpu.lt_def, sizeof(struct npc_lt_def_cfg));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5665

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_VLAN0_PCP_DEI,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5669

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_VLAN1_PCP_DEI,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5675

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4_DSCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5679

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4_DSCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5685

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6_DSCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5689

rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6_DSCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5695

static int nix_init_policer_context(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

570

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5708

rc = rvu_nix_blk_aq_enq_inst(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5711

dev_err(rvu->dev, "Failed to INIT bandwidth profile layer %d profile %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5716

static int nix_setup_ipolicers(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5719

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5724

cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5731

nix_hw->ipolicer = devm_kcalloc(rvu->dev, BAND_PROF_NUM_LAYERS,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5736

cfg = rvu_read64(rvu, blkaddr, NIX_AF_PL_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5759

ipolicer->pfvf_map = devm_kcalloc(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5765

ipolicer->match_id = devm_kcalloc(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5781

err = nix_init_policer_context(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5794

ipolicer->ref_count = devm_kcalloc(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5802

rvu_write64(rvu, blkaddr, NIX_AF_PL_TS, 19);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5804

nix_config_rx_pkt_policer_precolor(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5809

static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

581

static int nix_bp_disable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5814

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5876

int rvu_mbox_handler_nix_bandprof_alloc(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5885

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5888

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5892

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5913

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5917

static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5923

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5926

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5930

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

594

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5944

nix_clear_ratelimit_aggr(rvu, nix_hw, prof_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

595

type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5951

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5955

int rvu_mbox_handler_nix_bandprof_free(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

596

if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5965

return nix_free_all_bandprof(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5967

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5970

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5974

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

599

if (is_sdp_pfvf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5994

nix_clear_ratelimit_aggr(rvu, nix_hw, prof_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6001

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6005

int nix_aq_context_read(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6016

return rvu_nix_blk_aq_enq_inst(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

602

if (cpt_link && !rvu->hw->cpt_links)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6021

static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6040

return rvu_nix_blk_aq_enq_inst(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6047

int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

605

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6057

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

606

err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6060

rc = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6065

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6068

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6101

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6104

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6121

rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6125

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6131

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6133

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

614

cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6140

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6143

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6145

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6148

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

615

rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6153

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6156

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6173

rc = rvu_nix_blk_aq_enq_inst(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6176

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6183

rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6187

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6193

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6195

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6197

rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

620

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6201

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6208

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6210

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6217

static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6226

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6228

rc = nix_aq_context_read(rvu, nix_hw, &aq_req, &aq_rsp, 0x00,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6231

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6233

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6253

int rvu_mbox_handler_nix_bandprof_get_hwinfo(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6261

if (!rvu->hw->cap.ipolicer)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6264

err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6269

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6277

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

628

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6280

tu = rvu_read64(rvu, blkaddr, NIX_AF_PL_TS) & GENMASK_ULL(9, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6305

int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc, u32 mcast_grp_idx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6312

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6313

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6329

void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6339

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

634

int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6340

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6360

rvu_mbox_handler_nix_mcast_grp_destroy(rvu, &dreq, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6376

rvu_mbox_handler_nix_mcast_grp_update(rvu, &ureq, &ursp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

638

return nix_bp_disable(rvu, req, rsp, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6384

int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6392

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6393

nix_hw = get_nix_hw(rvu->hw, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6409

int rvu_mbox_handler_nix_mcast_grp_create(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

641

int rvu_mbox_handler_nix_cpt_bp_disable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6418

err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6443

int rvu_mbox_handler_nix_mcast_grp_destroy(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

645

return nix_bp_disable(rvu, req, rsp, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6455

err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

648

static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6487

rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6507

int rvu_mbox_handler_nix_mcast_grp_update(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6512

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

652

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6524

err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6552

rvu_mbox_handler_nix_mcast_grp_destroy(rvu, &dreq, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6561

npc_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6563

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, elem->mcam_index, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6576

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

658

pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6583

ret = nix_add_mce_list_entry(rvu, nix_hw, elem, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6592

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

660

err = nix_get_struct_ptrs(rvu, req->hdr.pcifunc, &nix_hw, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6600

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6609

ret = nix_del_mce_list_entry(rvu, nix_hw, elem, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6614

npc_enable_mcam_entry(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6629

nix_mcast_update_action(rvu, elem);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6630

npc_enable_mcam_entry(rvu, mcam, npc_blkaddr, elem->mcam_index, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6648

void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6650

struct rvu_block *block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6653

if (!block->implemented || is_cn20k(rvu->pdev))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6656

cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6657

rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

693

mutex_lock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

696

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

702

mutex_unlock(&rvu->rsrc_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

727

static int nix_bp_enable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

740

pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

741

type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

742

if (is_sdp_pfvf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

746

if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

750

if (cpt_link && !rvu->hw->cpt_links)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

753

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

754

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

756

bpid_base = rvu_nix_get_bpid(rvu, req, type, chan_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

762

dev_warn(rvu->dev, "Fail to enable backpressure\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

768

cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

770

rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

773

bpid = rvu_nix_get_bpid(rvu, req, type, chan_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

788

int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

792

return nix_bp_enable(rvu, req, rsp, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

795

int rvu_mbox_handler_nix_cpt_bp_enable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

799

return nix_bp_enable(rvu, req, rsp, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

802

static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

813

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

826

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

831

static void nix_setup_lso_tso_l4(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

841

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

850

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

855

static void nix_setup_lso(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

860

cfg = (rvu_read64(rvu, blkaddr, NIX_AF_CONST1) >> 48) & 0xFF;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

864

cfg = rvu_read64(rvu, blkaddr, NIX_AF_LSO_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

870

rvu_write64(rvu, blkaddr, NIX_AF_LSO_CFG, cfg | BIT_ULL(63));

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

877

nix_setup_lso_tso_l3(rvu, blkaddr, idx, true, &fidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

878

nix_setup_lso_tso_l4(rvu, blkaddr, idx, &fidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

882

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

890

nix_setup_lso_tso_l3(rvu, blkaddr, idx, false, &fidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

891

nix_setup_lso_tso_l4(rvu, blkaddr, idx, &fidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

895

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

901

static void nix_ctx_free(struct rvu *rvu, struct rvu_pfvf *pfvf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

907

qmem_free(rvu->dev, pfvf->rq_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

909

qmem_free(rvu->dev, pfvf->sq_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

91

int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

911

qmem_free(rvu->dev, pfvf->cq_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

913

qmem_free(rvu->dev, pfvf->rss_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

915

qmem_free(rvu->dev, pfvf->nix_qints_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

917

qmem_free(rvu->dev, pfvf->cq_ints_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

930

static int nixlf_rss_ctx_init(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

944

err = qmem_alloc(rvu->dev, &pfvf->rss_ctx, num_indices, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

948

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_BASE(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

958

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_CFG(nixlf), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

961

rvu_write64(rvu, blkaddr, NIX_AF_LFX_RSS_GRPX(nixlf, grp),

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

966

static int nix_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

97

return rvu->nix_blkaddr[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

978

reg = rvu_read64(rvu, block->addr, NIX_AF_AQ_STATUS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

988

rvu_write64(rvu, block->addr, NIX_AF_AQ_DOOR, 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

15

static int npa_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

158

rc = npa_aq_enqueue_wait(rvu, block, &inst);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

210

static int npa_lf_hwctx_disable(struct rvu *rvu, struct hwctx_disable_req *req)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

212

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

245

rc = rvu_npa_aq_enq_inst(rvu, &aq_req, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

248

dev_err(rvu->dev, "Failed to disable %s:%d context\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

258

static int npa_lf_hwctx_lockdown(struct rvu *rvu, struct npa_aq_enq_req *req)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

26

reg = rvu_read64(rvu, block->addr, NPA_AF_AQ_STATUS);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

271

err = rvu_npa_aq_enq_inst(rvu, &lock_ctx_req, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

273

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

281

int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

287

err = rvu_npa_aq_enq_inst(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

289

err = npa_lf_hwctx_lockdown(rvu, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

294

int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

298

return rvu_npa_aq_enq_inst(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

302

int rvu_mbox_handler_npa_hwctx_disable(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

306

return npa_lf_hwctx_disable(rvu, req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

309

static void npa_ctx_free(struct rvu *rvu, struct rvu_pfvf *pfvf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

314

qmem_free(rvu->dev, pfvf->aura_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

320

qmem_free(rvu->dev, pfvf->pool_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

323

qmem_free(rvu->dev, pfvf->npa_qints_ctx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

327

int rvu_mbox_handler_npa_lf_alloc(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

332

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

346

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

347

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

352

npalf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

357

err = rvu_lf_reset(rvu, block, npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

359

dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

36

rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

363

ctx_cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

367

err = qmem_alloc(rvu->dev, &pfvf->aura_ctx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

379

err = qmem_alloc(rvu->dev, &pfvf->pool_ctx, req->nr_pools, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

389

cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

394

err = qmem_alloc(rvu->dev, &pfvf->npa_qints_ctx, qints, hwctx_size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

398

cfg = rvu_read64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

404

rvu_write64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

407

rvu_write64(rvu, blkaddr, NPA_AF_LFX_LOC_AURAS_BASE(npalf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

411

rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

413

rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_BASE(npalf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

419

npa_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

424

cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

428

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

429

cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

435

int rvu_mbox_handler_npa_lf_free(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

438

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

445

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

446

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

451

npalf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

456

err = rvu_lf_reset(rvu, block, npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

458

dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

462

npa_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

467

static void npa_aq_ndc_config(struct rvu *rvu, struct rvu_block *block)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

471

if (is_cn20k(rvu->pdev)) /* NDC not applicable to cn20k */

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

475

cfg = rvu_read64(rvu, block->addr, NPA_AF_NDC_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

481

rvu_write64(rvu, block->addr, NPA_AF_NDC_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

484

static int npa_aq_init(struct rvu *rvu, struct rvu_block *block)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

490

cfg = rvu_read64(rvu, block->addr, NPA_AF_GEN_CFG);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

493

rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

496

rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

499

npa_aq_ndc_config(rvu, block);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

50

if (rvu_ndc_fix_locked_cacheline(rvu, BLKADDR_NDC_NPA0))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

502

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

503

cfg = rvu_read64(rvu, block->addr, NPA_AF_BATCH_CTL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

506

rvu_write64(rvu, block->addr, NPA_AF_BATCH_CTL, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

51

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

512

err = rvu_aq_alloc(rvu, &block->aq,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

518

rvu_write64(rvu, block->addr, NPA_AF_AQ_CFG, AQ_SIZE);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

519

rvu_write64(rvu, block->addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

524

int rvu_npa_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

526

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

529

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

534

return npa_aq_init(rvu, &hw->block[blkaddr]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

537

void rvu_npa_freemem(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

539

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

543

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

548

rvu_aq_free(rvu, block->aq);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

551

void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

553

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

559

npa_lf_hwctx_disable(rvu, &ctx_req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

563

npa_lf_hwctx_disable(rvu, &ctx_req);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

565

npa_ctx_free(rvu, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

575

int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

580

if (is_cn20k(rvu->pdev)) /* NDC not applicable to cn20k */

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

584

reg = rvu_read64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

585

rvu_write64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, reg & GENMASK_ULL(62, 0));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

588

err = rvu_poll_reg(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, GENMASK_ULL(47, 32), true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

590

dev_err(rvu->dev, "Timed out while polling for NDC CAM busy bits.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

594

ndc_af_const = rvu_read64(rvu, blkaddr, NDC_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

603

reg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

606

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

61

int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

64

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

74

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

78

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

85

dev_warn(rvu->dev, "%s: NPA AQ not initialized\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c

89

npalf = rvu_get_lf(rvu, block, pcifunc, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1002

void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1005

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

101

dev_err(rvu->dev, "%s: pkind not mapped\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1010

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1031

*(u64 *)&action = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1042

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1046

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

105

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1054

npc_update_vf_flow_entry(rvu, mcam, blkaddr, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1063

npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

107

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1071

npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1076

void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1079

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1080

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1085

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1094

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1099

pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1104

nix_get_mce_list(rvu, pcifunc, type, &mce_list, &mce_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1106

nix_update_mce_list(rvu, pcifunc, mce_list,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1109

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

111

val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1112

static void npc_enadis_default_entries(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1115

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1116

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1119

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1124

if (npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1128

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1134

if ((pcifunc & RVU_PFVF_FUNC_MASK) && !rvu->hw->cap.nix_rx_multicast)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1138

npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1142

void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1147

npc_enadis_default_entries(rvu, pcifunc, nixlf, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1150

npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1152

npc_enadis_default_mce_entry(rvu, pcifunc, nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1156

bool rvu_npc_enable_mcam_by_entry_index(struct rvu *rvu, int entry, int intf, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1158

int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1159

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

117

rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1174

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1184

void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1192

npc_enadis_default_entries(rvu, pcifunc, nixlf, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1195

void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1197

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1198

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1202

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1213

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1227

npc_mcam_disable_flows(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1229

rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1232

void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1234

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1238

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1245

npc_mcam_free_all_entries(rvu, mcam, blkaddr, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1248

npc_mcam_free_all_counters(rvu, mcam, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

126

struct rvu *rvu = hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1260

rvu_npc_disable_default_entries(rvu, pcifunc, nixlf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1263

static void npc_program_mkex_rx(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1271

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1292

static void npc_program_mkex_tx(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1300

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

131

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1321

static void npc_program_mkex_profile(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1324

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1329

rvu_write64(rvu, blkaddr, NPC_AF_KEX_LDATAX_FLAGS_CFG(ld),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1333

npc_program_mkex_rx(rvu, blkaddr, mkex, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1334

npc_program_mkex_tx(rvu, blkaddr, mkex, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1338

npc_program_mkex_hash(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1341

static int npc_fwdb_prfl_img_map(struct rvu *rvu, void __iomem **prfl_img_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1346

if (!rvu->fwdata)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1349

prfl_addr = rvu->fwdata->mcam_addr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

135

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1350

prfl_sz = rvu->fwdata->mcam_sz;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1367

static void npc_load_mkex_profile(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1370

struct device *dev = &rvu->pdev->dev;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1377

if (rvu->kpu_fwdata_sz ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1382

ret = npc_fwdb_prfl_img_map(rvu, &mkex_prfl_addr, &prfl_sz);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

139

block = &rvu->hw->block[blkaddr];

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1396

if (!is_rvu_96xx_B0(rvu) ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1398

rvu->kpu.mkex = mcam_kex;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1408

dev_info(rvu->dev, "Using %s mkex profile\n", rvu->kpu.mkex->name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

141

blkaddr = rvu_get_next_nix_blkaddr(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1410

npc_program_mkex_profile(rvu, blkaddr, rvu->kpu.mkex);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1415

static void npc_config_kpuaction(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1434

rvu_write64(rvu, blkaddr, reg, *(u64 *)&action1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1454

rvu_write64(rvu, blkaddr, reg, *(u64 *)&action0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1457

static void npc_config_kpucam(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1474

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1476

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1485

static void npc_program_kpu_profile(struct rvu *rvu, int blkaddr, int kpu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1492

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1497

max_entries = rvu->hw->npc_kpu_entries;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1502

npc_config_kpucam(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1508

npc_config_kpuaction(rvu, blkaddr, &profile->action[entry],

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

151

struct rvu *rvu = hw->rvu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1515

if (!rvu->kpu.custom)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1517

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

152

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1520

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1526

rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(kpu), 0x01);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1545

static int npc_apply_custom_kpu(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1549

struct npc_kpu_profile_fwdata *fw = rvu->kpu_fwdata;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1556

if (rvu->kpu_fwdata_sz < hdr_sz) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1557

dev_warn(rvu->dev, "Invalid KPU profile size\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1561

dev_warn(rvu->dev, "Invalid KPU profile signature %llx\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1568

dev_warn(rvu->dev, "Not supported Major version: %d > %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1576

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1588

dev_warn(rvu->dev, "Not enough KPUs: %d > %ld\n", fw->kpus,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1602

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1610

if (rvu->kpu_fwdata_sz < hdr_sz + offset) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1611

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1625

static int npc_load_kpu_prfl_img(struct rvu *rvu, void __iomem *prfl_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1634

dev_info(rvu->dev, "Loading KPU profile from firmware db: %s\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1636

rvu->kpu_fwdata = kpu_data;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1637

rvu->kpu_fwdata_sz = prfl_sz;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1638

rvu->kpu_prfl_addr = prfl_addr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1645

static int npc_fwdb_detect_load_prfl_img(struct rvu *rvu, uint64_t prfl_sz,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1653

img_data = (struct npc_coalesced_kpu_prfl __force *)rvu->kpu_prfl_addr;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1657

rc = npc_load_kpu_prfl_img(rvu, rvu->kpu_prfl_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1669

kpu_prfl_addr = (void __iomem *)((uintptr_t)rvu->kpu_prfl_addr +

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1671

rc = npc_load_kpu_prfl_img(rvu, kpu_prfl_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1683

static int npc_load_kpu_profile_fwdb(struct rvu *rvu, const char *kpu_profile)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1689

ret = npc_fwdb_prfl_img_map(rvu, &rvu->kpu_prfl_addr, &prfl_sz);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1694

ret = npc_fwdb_detect_load_prfl_img(rvu, prfl_sz, kpu_profile);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1699

if (rvu->kpu_prfl_addr) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1700

iounmap(rvu->kpu_prfl_addr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1701

rvu->kpu_prfl_addr = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1702

rvu->kpu_fwdata_sz = 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1703

rvu->kpu_fwdata = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1710

static void npc_load_kpu_profile(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1712

struct npc_kpu_profile_adapter *profile = &rvu->kpu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1713

const char *kpu_profile = rvu->kpu_pfl_name;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1728

if (!request_firmware_direct(&fw, kpu_profile, rvu->dev)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1729

dev_info(rvu->dev, "Loading KPU profile from firmware: %s\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1731

rvu->kpu_fwdata = kzalloc(fw->size, GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1732

if (rvu->kpu_fwdata) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1733

memcpy(rvu->kpu_fwdata, fw->data, fw->size);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1734

rvu->kpu_fwdata_sz = fw->size;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1743

if (npc_load_kpu_profile_fwdb(rvu, kpu_profile))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1748

if (!rvu->kpu_fwdata_sz || npc_apply_custom_kpu(rvu, profile)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1752

if (rvu->kpu_fwdata || rvu->kpu_fwdata_sz) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1754

if (rvu->kpu_prfl_addr) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1755

iounmap(rvu->kpu_prfl_addr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1756

rvu->kpu_prfl_addr = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1758

kfree(rvu->kpu_fwdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1760

rvu->kpu_fwdata = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1761

rvu->kpu_fwdata_sz = 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1768

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1771

kfree(rvu->kpu_fwdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1772

rvu->kpu_fwdata = NULL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1776

dev_info(rvu->dev, "Using custom profile '%s', version %d.%d.%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1787

static void npc_parser_profile_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1789

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1794

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1796

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1798

rvu_write64(rvu, blkaddr, NPC_AF_KPUX_CFG(idx), 0x00);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1802

npc_load_kpu_profile(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1808

num_pkinds = rvu->kpu.pkinds;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1812

npc_config_kpuaction(rvu, blkaddr, &rvu->kpu.ikpu[idx], 0, idx, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1815

num_kpus = rvu->kpu.kpus;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1819

npc_program_kpu_profile(rvu, blkaddr, idx, &rvu->kpu.kpu[idx]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1822

void npc_mcam_rsrcs_deinit(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1824

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1836

int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1838

int nixlf_count = rvu_get_nixlf_count(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1839

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1846

cfg = (rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

185

bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1867

((rvu->hw->total_pfs - 1) * RSVD_MCAM_ENTRIES_PER_PF);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1869

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

192

cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(index, bank));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

196

void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1970

static void rvu_npc_hw_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1972

struct npc_pkind *pkind = &rvu->hw->pkind;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1973

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1974

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1978

npc_const = rvu_read64(rvu, blkaddr, NPC_AF_CONST);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1979

npc_const1 = rvu_read64(rvu, blkaddr, NPC_AF_CONST1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1981

npc_const2 = rvu_read64(rvu, blkaddr, NPC_AF_CONST2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2015

static void rvu_npc_setup_interfaces(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2017

struct npc_mcam_kex *mkex = rvu->kpu.mkex;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2018

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2019

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2034

nibble_ena = rvu_npc_get_tx_nibble_cfg(rvu, nibble_ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

204

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2047

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2054

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2060

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2072

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2078

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2084

int rvu_npc_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2086

struct npc_kpu_profile_adapter *kpu = &rvu->kpu;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2087

struct npc_pkind *pkind = &rvu->hw->pkind;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2088

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2091

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2093

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2097

rvu_npc_hw_init(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

210

static void npc_clear_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2102

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2115

pkind->pfchan_map = devm_kcalloc(rvu->dev, pkind->rsrc.max,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2121

npc_parser_profile_init(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2124

rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OL2,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2127

rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_OIP4,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2132

rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_IIP4,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2143

rvu_write64(rvu, blkaddr, NPC_AF_PCK_CFG,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2144

rvu_read64(rvu, blkaddr, NPC_AF_PCK_CFG) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2148

rvu_npc_setup_interfaces(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2150

npc_config_secret_key(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2152

npc_load_mkex_profile(rvu, blkaddr, rvu->mkex_pfl_name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2154

err = npc_mcam_rsrcs_init(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2158

err = npc_flow_steering_init(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2160

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2162

npc_load_mkex_profile(rvu, blkaddr, def_pfl_name);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2168

void rvu_npc_freemem(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2170

struct npc_pkind *pkind = &rvu->hw->pkind;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2171

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2174

npc_mcam_rsrcs_deinit(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2175

if (rvu->kpu_prfl_addr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2176

iounmap(rvu->kpu_prfl_addr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2178

kfree(rvu->kpu_fwdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

218

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2182

void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2186

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2195

if (is_mcam_entry_enabled(rvu, mcam, blkaddr, entry))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

220

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2201

void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2205

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

223

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

225

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2253

static void npc_map_mcam_entry_and_cntr(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2258

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2264

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2269

static void npc_unmap_mcam_entry_and_cntr(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

228

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2280

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

230

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2316

static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2328

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2333

npc_unmap_mcam_entry_and_cntr(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2341

static void npc_mcam_free_all_counters(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2678

void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2680

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2685

int npc_config_cntr_default_entries(struct rvu *rvu, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2687

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2692

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2698

if (!is_mcam_entry_enabled(rvu, mcam, blkaddr, rule->entry))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2703

__rvu_mcam_add_counter_to_rule(rvu, rule->owner,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2706

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2711

npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2714

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2720

__rvu_mcam_remove_counter_from_rule(rvu, rule->owner,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2728

int rvu_mbox_handler_npc_mcam_alloc_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2732

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2736

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2761

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2768

if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2774

int rvu_mbox_handler_npc_mcam_free_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2778

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2783

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2788

if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2803

npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2808

npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2815

npc_mcam_free_all_entries(rvu, mcam, blkaddr, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2821

int rvu_mbox_handler_npc_mcam_read_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2825

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2829

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2836

npc_read_mcam_entry(rvu, mcam, blkaddr, req->entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2845

int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2849

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2850

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2855

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2870

if (!is_npc_interface_valid(rvu, req->intf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2884

npc_config_mcam_entry(rvu, mcam, blkaddr, req->entry, nix_intf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2888

npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2897

int rvu_mbox_handler_npc_mcam_ena_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2901

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2905

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2915

npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2920

int rvu_mbox_handler_npc_mcam_dis_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2924

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2928

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2938

npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2943

int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2947

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2953

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2983

npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2986

npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2991

npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2993

npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2998

npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2999

npc_enable_mcam_entry(rvu, mcam, blkaddr, old_entry, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3012

static int __npc_mcam_alloc_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3016

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3021

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3026

if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3073

int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3077

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3082

err = __npc_mcam_alloc_counter(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3088

static int __npc_mcam_free_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3092

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3096

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3121

npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3128

int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3131

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3136

err = __npc_mcam_free_counter(rvu, req, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3143

void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3155

__npc_mcam_free_counter(rvu, &free_req, &free_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3159

void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3175

err = __npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3185

int rvu_mbox_handler_npc_mcam_unmap_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3188

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3192

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

32

static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3206

npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3224

npc_unmap_mcam_entry_and_cntr(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3232

int rvu_mbox_handler_npc_mcam_clear_counter(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3235

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3238

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3248

rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr), 0x00);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3253

int rvu_mbox_handler_npc_mcam_counter_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3257

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3260

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3270

rsp->stat = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3276

int rvu_mbox_handler_npc_mcam_alloc_and_write_entry(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3280

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3285

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3291

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3295

if (!is_npc_interface_valid(rvu, req->intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3305

rc = rvu_mbox_handler_npc_mcam_alloc_entry(rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3323

rc = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3343

npc_config_mcam_entry(rvu, mcam, blkaddr, entry, nix_intf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3347

npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr, entry, cntr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3357

rvu_read64(rvu, BLKADDR_NPC, NPC_AF_INTFX_KEX_CFG(intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3360

rvu_read64(rvu, BLKADDR_NPC, NPC_AF_KEX_LDATAX_FLAGS_CFG(ld))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3363

rvu_read64(rvu, BLKADDR_NPC, \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3367

rvu_read64(rvu, BLKADDR_NPC, \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3370

int rvu_mbox_handler_npc_get_kex_cfg(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3398

memcpy(rsp->mkex_pfl_name, rvu->mkex_pfl_name, MKEX_NAME_LEN);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

34

static void npc_mcam_free_all_counters(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3403

npc_set_var_len_offset_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3420

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3422

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3425

val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3431

rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3435

int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3440

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3442

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3447

rxpkind = rvu_npc_get_pkind(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3453

rc = npc_set_var_len_offset_pkind(rvu, pcifunc, pkind,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3466

if (!is_cgx_config_permitted(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3468

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3470

rc = cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3478

rc = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3482

rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3490

int rvu_mbox_handler_npc_set_pkind(struct rvu *rvu, struct npc_set_pkind *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3493

return rvu_npc_set_parse_mode(rvu, req->hdr.pcifunc, req->mode,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3498

int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3502

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3508

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3514

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3527

rc = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3537

npc_read_mcam_entry(rvu, mcam, blkaddr, index, &rsp->entry, &intf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3544

int rvu_mbox_handler_npc_mcam_entry_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3548

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3554

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3564

regval = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_STAT_ACT(index, bank));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3566

if (!(regval & rvu->hw->npc_stat_ena)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3575

rsp->stat = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(cntr));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3583

void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3585

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3589

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3596

npc_enable_mcam_entry(rvu, mcam, blkaddr, ucast_idx, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3598

npc_set_mcam_action(rvu, mcam, blkaddr, ucast_idx, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

3600

npc_clear_mcam_entry(rvu, mcam, blkaddr, ucast_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

366

static u64 npc_get_default_entry_action(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

372

if (nix_get_nixlf(rvu, pf_func, &nixlf, NULL)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

373

dev_err(rvu->dev, "%s: nixlf not attached to pcifunc:0x%x\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

384

return rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

388

static void npc_fixup_vf_rule(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

400

if (is_pffunc_af(owner) || is_lbk_vf(rvu, target_func) ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

406

pfvf = rvu_get_pfvf(rvu, target_func);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

410

if (!(is_nixlf_attached(rvu, target_func) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

425

rx_action = npc_get_default_entry_action(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

431

static void npc_config_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

446

npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

449

npc_clear_mcam_entry(rvu, mcam, blkaddr, actindex);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

468

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

47

bool is_npc_interface_valid(struct rvu *rvu, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

471

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

477

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

479

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

483

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

485

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

49

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

491

npc_fixup_vf_rule(rvu, mcam, blkaddr, actindex, entry, &enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

494

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

498

rvu_write64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_TAG_ACT(index, actbank),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

503

npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

506

void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

518

cam1 = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

520

cam0 = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

524

cam1 = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

526

cam0 = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

531

entry->action = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

534

rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

536

*intf = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

538

*ena = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

54

int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

542

static void npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

558

cfg = rvu_read64(rvu, blkaddr, sreg + (i * 8));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

559

rvu_write64(rvu, blkaddr, dreg + (i * 8), cfg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

564

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

566

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

570

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

572

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

576

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

578

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

582

u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

588

return rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

59

if (is_rvu_96xx_B0(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

592

void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

598

return rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

602

void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

605

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

608

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

613

if (is_lbk_vf(rvu, pcifunc) || is_sdp_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

616

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

623

if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

632

if (is_mcam_entry_enabled(rvu, mcam, blkaddr, index)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

633

*(u64 *)&action = npc_get_mcam_action(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

64

void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

654

rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

657

void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

660

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

663

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

664

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

670

if (!hw->cap.nix_rx_multicast && is_cgx_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

673

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

680

if (is_cgx_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

69

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

690

if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

691

*(u64 *)&action = npc_get_mcam_action(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

703

is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc))) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

706

pfvf = rvu_get_pfvf(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

715

if (!is_rvu_otx2(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

723

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

742

rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

745

void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

748

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

75

rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_CPI_DEFX(pkind, 0), val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

751

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

760

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

763

void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

769

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

770

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

773

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

778

if (is_lbk_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

78

int rvu_npc_get_pkind(struct rvu *rvu, u16 pf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

789

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

794

if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

795

!npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

80

struct npc_pkind *pkind = &rvu->hw->pkind;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

822

rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

825

void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

830

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

831

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

840

if (is_lbk_vf(rvu, pcifunc) && is_sdp_vf(rvu, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

843

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

850

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

855

if (!npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC), pfvf->nix_rx_intf) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

856

!npc_is_feature_supported(rvu, BIT_ULL(NPC_LXMB), pfvf->nix_rx_intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

867

if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

868

*(u64 *)&action = npc_get_mcam_action(rvu, mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

895

if (!is_rvu_otx2(rvu))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

910

rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

913

void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

916

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

919

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

928

npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

931

static void npc_update_vf_flow_entry(struct rvu *rvu, struct npc_mcam *mcam,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

94

int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

957

enable = is_mcam_entry_enabled(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

960

npc_enable_mcam_entry(rvu, mcam, blkaddr, actindex,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

963

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

967

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

974

static void npc_update_rx_action_with_alg_idx(struct rvu *rvu, struct nix_rx_action action,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

979

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

980

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

983

if (!is_mcam_entry_enabled(rvu, mcam, blkaddr, mcam_index))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

99

pkind = rvu_npc_get_pkind(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

993

*(u64 *)&action = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

998

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1041

npc_update_ipv6_flow(rvu, entry, features, pkt, mask, output, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1042

npc_update_vlan_features(rvu, entry, features, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1044

npc_update_field_hash(rvu, intf, entry, blkaddr, features,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1081

static void rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1084

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1088

__rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1093

static void rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1097

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1101

__rvu_mcam_add_counter_to_rule(rvu, pcifunc, rule, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1106

static int npc_mcast_update_action_index(struct rvu *rvu, struct npc_install_flow_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1119

mce_index = rvu_nix_mcast_get_mce_index(rvu, req->hdr.pcifunc, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1132

static int npc_update_rx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1137

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1144

npc_update_entry(rvu, NPC_CHAN, entry, req->channel, 0, req->chan_mask,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1152

ret = npc_mcast_update_action_index(rvu, req, action.op, (void *)&action);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1193

static int npc_update_tx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1207

npc_update_entry(rvu, NPC_PF_FUNC, entry, (__force u16)htons(target),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1214

ret = npc_mcast_update_action_index(rvu, req, action.op, (void *)&action);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1237

static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1246

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1261

npc_update_flow(rvu, entry, features, &req->packet, &req->mask, &dummy,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1265

err = npc_update_rx_entry(rvu, pfvf, entry, req, target, pf_set_vfs_mac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1269

err = npc_update_tx_entry(rvu, pfvf, entry, req, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1281

enable = is_mcam_entry_enabled(rvu, mcam, blkaddr, entry_index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1289

npc_update_flow(rvu, entry, missing_features,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1308

rvu_mcam_add_counter_to_rule(rvu, owner, rule, rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1314

rvu_mcam_remove_counter_from_rule(rvu, owner, rule);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1329

rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(rule->cntr), req->cntr_val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1362

err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1365

rvu_mcam_remove_counter_from_rule(rvu, owner, rule);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1386

return rvu_nix_setup_ratelimit_aggr(rvu, req->hdr.pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

139

static bool npc_is_field_present(struct rvu *rvu, enum key_fields type, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1390

return rvu_nix_mcast_update_mcam_entry(rvu, req->hdr.pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1396

int rvu_mbox_handler_npc_install_flow(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1401

bool from_rep_dev = !!is_rep_dev(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1402

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1409

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

141

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1411

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1415

if (!is_npc_interface_valid(rvu, req->intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1422

if (npc_check_field(rvu, blkaddr, NPC_DMAC, req->intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1428

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1434

if (!npc_is_field_present(rvu, NPC_LXMB, req->intf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1435

dev_warn(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1475

err = npc_check_unsupported_flows(rvu, req->features, req->intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1479

pfvf = rvu_get_pfvf(rvu, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1495

err = nix_get_nixlf(rvu, target, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1500

if (!(is_nixlf_attached(rvu, target) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1524

err = npc_install_flow(rvu, blkaddr, target, nixlf, pfvf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1531

static int npc_delete_flow(struct rvu *rvu, struct rvu_npc_mcam_rule *rule,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1541

rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1549

return rvu_mbox_handler_npc_mcam_dis_entry(rvu, &dis_req, &dis_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1552

int rvu_mbox_handler_npc_delete_flow(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1556

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1576

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1578

rsp->cntr_val = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1592

if (npc_delete_flow(rvu, iter, pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1593

dev_err(rvu->dev, "rule deletion failed for entry:%u",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1600

static int npc_update_dmac_value(struct rvu *rvu, int npcblkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1606

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1613

npc_read_mcam_entry(rvu, mcam, npcblkaddr, rule->entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1616

npc_update_entry(rvu, NPC_DMAC, entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1625

err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1631

void npc_mcam_enable_flows(struct rvu *rvu, u16 target)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1633

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, target);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1635

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1640

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1651

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1658

npc_update_dmac_value(rvu, blkaddr, rule, pfvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1667

rvu_write64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1672

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1681

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1687

void npc_mcam_disable_flows(struct rvu *rvu, u16 target)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1689

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1692

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1700

npc_enable_mcam_entry(rvu, mcam, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1709

int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1716

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1723

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1725

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1730

if (!rvu_npc_exact_has_match_table(rvu)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1731

dev_info(rvu->dev, "%s: No support for exact match feature\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1736

enabled = is_mcam_entry_enabled(rvu, mcam, blkaddr, mcam_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1738

dev_err(rvu->dev, "%s: failed to add single drop on non hit rule at %d th index\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1758

npc_mcam_rsrcs_reserve(rvu, blkaddr, mcam_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1764

err = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1766

dev_err(rvu->dev, "%s: Err to allocate cntr for drop rule (err=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1773

npc_update_entry(rvu, NPC_EXACT_RESULT, &req.entry_data, exact_val, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1775

npc_update_entry(rvu, NPC_CHAN, &req.entry_data, chan_val, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1777

npc_update_entry(rvu, NPC_LXMB, &req.entry_data, bcast_mcast_val, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1785

err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1787

dev_err(rvu->dev, "%s: Installation of single drop on non hit rule at %d failed\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1792

dev_err(rvu->dev, "%s: Installed single drop on non hit rule at %d, cntr=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1796

npc_enable_mcam_entry(rvu, mcam, blkaddr, mcam_idx, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1801

int rvu_mbox_handler_npc_get_field_status(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1807

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1811

if (!is_npc_interface_valid(rvu, req->intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1814

if (npc_check_field(rvu, blkaddr, req->field, req->intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

198

static bool npc_check_overlap(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

201

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

218

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

247

static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

250

if (!npc_is_field_present(rvu, type, intf) ||

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

251

npc_check_overlap(rvu, blkaddr, type, 0, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

328

static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

330

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

371

dev_err(rvu->dev, "mkex: Ethertype is not extracted.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

387

dev_err(rvu->dev, "mkex: Etype pos is different for untagged and tagged pkts.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

396

dev_err(rvu->dev, "mkex: Etype pos is different for untagged and double tagged pkts.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

405

dev_err(rvu->dev, "mkex: Etype pos is different for tagged and double tagged pkts.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

414

if (npc_check_overlap(rvu, blkaddr, NPC_ETYPE, start_lid, intf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

415

dev_err(rvu->dev, "mkex: Ethertype is overwritten by higher layers.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

422

dev_err(rvu->dev, "mkex: Outer vlan tci is not extracted.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

436

dev_err(rvu->dev, "mkex: Out vlan tci pos is different for tagged and double tagged pkts.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

444

if (npc_check_overlap(rvu, blkaddr, NPC_OUTER_VID, start_lid, intf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

445

dev_err(rvu->dev, "mkex: Outer vlan tci is overwritten by higher layers.\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

459

static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

462

struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

463

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

511

if (rvu->hw->cap.npc_hash_extract) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

560

static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

562

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

571

if (npc_check_field(rvu, blkaddr, hdr, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

584

if (!npc_check_field(rvu, blkaddr, NPC_LD, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

594

if (npc_check_field(rvu, blkaddr, NPC_LD, intf)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

60

bool npc_is_feature_supported(struct rvu *rvu, u64 features, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

601

if (npc_check_field(rvu, blkaddr, NPC_LE, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

606

if (!npc_check_field(rvu, blkaddr, NPC_LB, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

610

if (npc_is_field_present(rvu, NPC_IPSEC_SPI, intf) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

615

if (npc_check_field(rvu, blkaddr, NPC_LB, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

62

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

620

if (npc_check_field(rvu, blkaddr, NPC_LXMB, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

624

if (npc_check_field(rvu, blkaddr, hdr, intf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

633

static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

635

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

645

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

667

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

672

npc_scan_ldata(rvu, blkaddr, lid, lt, cfg,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

681

static int npc_scan_verify_kex(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

685

err = npc_scan_kex(rvu, blkaddr, NIX_INTF_RX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

689

err = npc_scan_kex(rvu, blkaddr, NIX_INTF_TX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

694

if (!npc_is_field_present(rvu, NPC_CHAN, NIX_INTF_RX)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

695

dev_err(rvu->dev, "Channel not present in Key\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

699

if (npc_check_overlap(rvu, blkaddr, NPC_CHAN, 0, NIX_INTF_RX)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

700

dev_err(rvu->dev, "Channel cannot be overwritten\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

704

npc_set_features(rvu, blkaddr, NIX_INTF_TX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

705

npc_set_features(rvu, blkaddr, NIX_INTF_RX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

706

npc_handle_multi_layer_fields(rvu, blkaddr, NIX_INTF_TX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

707

npc_handle_multi_layer_fields(rvu, blkaddr, NIX_INTF_RX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

712

int npc_flow_steering_init(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

714

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

718

return npc_scan_verify_kex(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

721

static int npc_check_unsupported_flows(struct rvu *rvu, u64 features, u8 intf)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

723

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

733

dev_warn(rvu->dev, "Unsupported flow(s):\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

735

dev_warn(rvu->dev, "%s ", npc_get_field_name(bit));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

753

void npc_update_entry(struct rvu *rvu, enum key_fields type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

757

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

834

static void npc_update_ipv6_flow(struct rvu *rvu, struct mcam_entry *entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

860

npc_update_entry(rvu, NPC_SIP_IPV6, entry, val_lo, val_hi,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

874

npc_update_entry(rvu, NPC_DIP_IPV6, entry, val_lo, val_hi,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

881

static void npc_update_vlan_features(struct rvu *rvu, struct mcam_entry *entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

890

npc_update_entry(rvu, NPC_LB, entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

896

npc_update_entry(rvu, NPC_LB, entry, NPC_LT_LB_CTAG, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

899

npc_update_entry(rvu, NPC_LB, entry, NPC_LT_LB_STAG_QINQ, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

903

static void npc_update_flow(struct rvu *rvu, struct mcam_entry *entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

921

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_TCP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

924

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_UDP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

927

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_SCTP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

930

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_ICMP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

933

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_ICMP6,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

938

npc_update_entry(rvu, NPC_LD, entry, NPC_LT_LD_AH,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

942

npc_update_entry(rvu, NPC_LE, entry, NPC_LT_LE_ESP,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

947

npc_update_entry(rvu, NPC_LXMB, entry, output->lxmb, 0,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

953

npc_update_entry(rvu, (field), entry, (val_lo), (val_hi), \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h

17

void npc_update_entry(struct rvu *rvu, enum key_fields type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1000

dev_dbg(rvu->dev, "%s: inserted in fully associative hash table index=%u\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1005

dev_err(rvu->dev, "%s: failed to insert in fully associative hash table\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1018

static bool rvu_npc_exact_save_drop_rule_chan_and_mask(struct rvu *rvu, int drop_mcam_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1024

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

103

static u64 npc_update_use_hash(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1060

static bool rvu_npc_exact_calc_drop_rule_chan_and_mask(struct rvu *rvu, u8 intf_type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1070

chan_val = rvu_nix_chan_cgx(rvu, cgx_id, lmac_id, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

109

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1091

u16 rvu_npc_exact_drop_rule_to_pcifunc(struct rvu *rvu, u32 drop_rule_idx)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1096

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1108

dev_err(rvu->dev, "%s: drop mcam rule index (%d) >= NPC_MCAM_DROP_RULE_MAX\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1125

static bool rvu_npc_exact_get_drop_rule_info(struct rvu *rvu, u8 intf_type, u8 cgx_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1134

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1137

dev_err(rvu->dev, "%s: No drop rule for LBK/SDP mode\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1141

rc = rvu_npc_exact_calc_drop_rule_chan_and_mask(rvu, intf_type, cgx_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1165

dev_err(rvu->dev, "%s: drop mcam rule index (%d) >= NPC_MCAM_DROP_RULE_MAX\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1170

dev_err(rvu->dev, "%s: Could not retrieve for cgx=%d, lmac=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1187

static u16 __rvu_npc_exact_cmd_rules_cnt_update(struct rvu *rvu, int drop_mcam_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1194

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

122

static void npc_program_mkex_hash_rx(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1237

static int rvu_npc_exact_del_table_entry_by_id(struct rvu *rvu, u32 seq_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1246

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

125

struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1251

entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1253

dev_dbg(rvu->dev, "%s: failed to find entry for id=%d\n", __func__, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1267

rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, entry->cgx_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1270

dev_dbg(rvu->dev, "%s: failed to retrieve drop info for id=0x%x\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1277

__rvu_npc_exact_cmd_rules_cnt_update(rvu, drop_mcam_idx, -1, &disable_cam);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1281

rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1282

dev_dbg(rvu->dev, "%s: Disabling mcam idx %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1288

rvu_npc_exact_dealloc_table_entry(rvu, entry->opc_type, entry->ways, entry->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1290

rvu_npc_exact_free_id(rvu, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1292

dev_dbg(rvu->dev, "%s: delete entry success for id=0x%x, mca=%pM\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1316

static int rvu_npc_exact_add_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_id, u8 *mac,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1320

int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1332

err = rvu_npc_exact_alloc_table_entry(rvu, mac, chan, ctype, &index, &ways, &opc_type);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1334

dev_err(rvu->dev, "%s: Could not alloc in exact match table\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1339

mdata = rvu_exact_prepare_table_entry(rvu, true, ctype, chan, mac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1342

rvu_npc_exact_cam_table_write(rvu, blkaddr, index, mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1344

rvu_npc_exact_mem_table_write(rvu, blkaddr, ways, index, mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1347

err = rvu_npc_exact_add_to_list(rvu, opc_type, ways, index, cgx_id, lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1350

rvu_npc_exact_dealloc_table_entry(rvu, opc_type, ways, index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1351

dev_err(rvu->dev, "%s: could not add to exact match table\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1355

rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1358

rvu_npc_exact_dealloc_table_entry(rvu, opc_type, ways, index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1359

dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1365

__rvu_npc_exact_cmd_rules_cnt_update(rvu, drop_mcam_idx, 1, &enable_cam);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1369

rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1370

dev_dbg(rvu->dev, "%s: Enabling mcam idx %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1374

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1394

static int rvu_npc_exact_update_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1397

int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1403

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1408

entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, *seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

141

cfg = npc_update_use_hash(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1411

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1421

hash_index = rvu_exact_calculate_hash(rvu, entry->chan, entry->ctype,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1425

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1433

mdata = rvu_exact_prepare_table_entry(rvu, true, entry->ctype, entry->chan, new_mac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1436

rvu_npc_exact_mem_table_write(rvu, blkaddr, entry->ways, entry->index, mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1438

rvu_npc_exact_cam_table_write(rvu, blkaddr, entry->index, mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1444

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1448

dev_dbg(rvu->dev, "%s: Successfully updated entry (old mac=%pM new_mac=%pM\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1465

int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1468

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1474

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1476

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1477

rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1480

dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1490

dev_dbg(rvu->dev, "%s: Err Already promisc mode disabled (cgx=%d lmac=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1498

rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1501

dev_dbg(rvu->dev, "%s: disabled promisc mode (cgx=%d lmac=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1512

int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1515

int pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1521

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1523

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1524

rc = rvu_npc_exact_get_drop_rule_info(rvu, NIX_INTF_TYPE_CGX, cgx_id, lmac_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1527

dev_dbg(rvu->dev, "%s: failed to get drop rule info cgx=%d lmac=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1537

dev_dbg(rvu->dev, "%s: Already in promisc mode (cgx=%d lmac=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1545

rvu_npc_enable_mcam_by_entry_index(rvu, drop_mcam_idx, NIX_INTF_RX,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1548

dev_dbg(rvu->dev, "%s: Enabled promisc mode (cgx=%d lmac=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1560

int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1563

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1569

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1571

pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1573

rc = rvu_npc_exact_del_table_entry_by_id(rvu, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1576

dev_err(rvu->dev, "%s MAC (%pM) del PF=%d failed\n", __func__, pfvf->mac_addr, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1580

dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d success (seq_id=%u)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1592

int rvu_npc_exact_mac_addr_update(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1596

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1605

if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1608

dev_dbg(rvu->dev, "%s: Update request for seq_id=%d, mac=%pM\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1611

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1613

pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1615

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

162

static void npc_program_mkex_hash_tx(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1620

entry = __rvu_npc_exact_find_entry_by_seq_id(rvu, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1622

dev_err(rvu->dev, "%s: failed to find entry for id=0x%x\n", __func__, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1631

rc = rvu_npc_exact_update_table_entry(rvu, cgx_id, lmac_id, old_mac,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1635

dev_dbg(rvu->dev, "%s mac:%pM (pfvf:%pM default:%pM) update to PF=%d success\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1642

rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1645

dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d failed\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1649

rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

165

struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1653

dev_err(rvu->dev, "%s MAC (%pM) add PF=%d failed\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1659

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1674

int rvu_npc_exact_mac_addr_add(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1678

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1684

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1685

pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1687

rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1693

dev_dbg(rvu->dev, "%s MAC (%pM) add to PF=%d success (seq_id=%u)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1698

dev_err(rvu->dev, "%s MAC (%pM) add to PF=%d failed\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1710

int rvu_npc_exact_mac_addr_del(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1714

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1717

rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1719

dev_dbg(rvu->dev, "%s del to PF=%d success (seq_id=%u)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1724

dev_err(rvu->dev, "%s del to PF=%d failed (seq_id=%u)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1736

int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1739

int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1746

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1748

pfvf = &rvu->pf[pf];

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1753

rc = rvu_npc_exact_update_table_entry(rvu, cgx_id, lmac_id, pfvf->mac_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1759

dev_dbg(rvu->dev, "%s MAC (%pM) update to PF=%d success\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1765

rc = rvu_npc_exact_del_table_entry_by_id(rvu, req->index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1767

dev_dbg(rvu->dev, "%s MAC (%pM) del PF=%d failed\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1772

rc = nix_get_nixlf(rvu, req->hdr.pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1774

mcam_idx = npc_get_nixlf_mcam_index(&rvu->hw->mcam, req->hdr.pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1778

rc = rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1782

dev_err(rvu->dev, "%s MAC (%pM) add PF=%d failed\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1790

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1801

bool rvu_npc_exact_can_disable_feature(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1803

struct npc_exact_table *table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1806

if (!rvu->hw->cap.npc_exact_match_enabled)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

181

cfg = npc_update_use_hash(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1820

void rvu_npc_exact_disable_feature(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1822

rvu->hw->cap.npc_exact_match_enabled = false;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1830

void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1832

struct npc_exact_table *table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1842

dev_dbg(rvu->dev, "%s: resetting pcifun=%d seq_id=%u\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1846

rvu_npc_exact_del_table_entry_by_id(rvu, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1860

int rvu_npc_exact_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1880

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1882

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1887

npc_const3 = rvu_read64(rvu, blkaddr, NPC_AF_CONST3);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1892

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(NIX_INTF_RX));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1897

rvu->hw->cap.npc_exact_match_enabled = true;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1903

dev_dbg(rvu->dev, "%s: Memory allocation for table success\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1904

rvu->hw->table = table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1911

dev_dbg(rvu->dev, "%s: NPC exact match 4way_2k table(ways=%d, depth=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1918

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1927

table->mem_table.bmap = devm_bitmap_zalloc(rvu->dev, table_size,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1932

dev_dbg(rvu->dev, "%s: Allocated bitmap for 4way 2K entry table\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1935

table->cam_table.bmap = devm_bitmap_zalloc(rvu->dev, 32, GFP_KERNEL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1940

dev_dbg(rvu->dev, "%s: Allocated bitmap for 32 entry cam\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1943

table->id_bmap = devm_bitmap_zalloc(rvu->dev, table->tot_ids,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1949

dev_dbg(rvu->dev, "%s: Allocated bitmap for id map (total=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1964

rvu_exact_config_secret_key(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1965

rvu_exact_config_search_key(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1967

rvu_exact_config_table_mask(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1968

rvu_exact_config_result_ctrl(rvu, table->mem_table.depth);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1985

max_lmac_cnt = rvu->cgx_cnt_max * rvu->hw->lmac_per_cgx +

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1989

if (rvu->pf2cgxlmac_map[i] == 0xFF)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1992

rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[i], &cgx_id, &lmac_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1994

rc = rvu_npc_exact_calc_drop_rule_chan_and_mask(rvu, NIX_INTF_TYPE_CGX, cgx_id,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

1997

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

200

void npc_config_secret_key(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2004

pcifunc = RVU_PFFUNC(rvu->pdev, i, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2006

dev_dbg(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2010

rc = rvu_npc_exact_save_drop_rule_chan_and_mask(rvu, table->num_drop_rules,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2013

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2019

err = npc_install_mcam_drop_rule(rvu, *drop_mcam_idx,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

202

struct hw_cap *hwcap = &rvu->hw->cap;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2025

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

203

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

2034

dev_info(rvu->dev, "initialized exact match table successfully\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

210

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

212

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

214

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

219

void npc_program_mkex_hash(struct rvu *rvu, int blkaddr)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

221

struct npc_mcam_kex_hash *mh = rvu->kpu.mkex_hash;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

222

struct hw_cap *hwcap = &rvu->hw->cap;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

224

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

247

cfg = rvu_read64(rvu, blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

270

npc_program_mkex_hash_rx(rvu, blkaddr, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

271

npc_program_mkex_hash_tx(rvu, blkaddr, intf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

275

void npc_update_field_hash(struct rvu *rvu, u8 intf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

284

struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

291

if (!rvu->hw->cap.npc_hash_extract) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

292

dev_dbg(rvu->dev, "%s: Field hash extract feature is not supported\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

297

rvu_mbox_handler_npc_get_field_hash_info(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

300

cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_CFG(intf, hash_idx));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

326

npc_update_entry(rvu, NPC_SIP_IPV6, entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

343

npc_update_entry(rvu, NPC_DIP_IPV6, entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

359

int rvu_mbox_handler_npc_get_field_hash_info(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

367

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

369

dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

373

secret_key[0] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY0(intf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

374

secret_key[1] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY1(intf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

375

secret_key[2] = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_SECRET_KEY2(intf));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

426

static u32 rvu_exact_calculate_hash(struct rvu *rvu, u16 chan, u16 ctype, u8 *mac,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

429

struct npc_exact_table *table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

444

dev_dbg(rvu->dev, "%s: ldata=0x%llx hash_key0=0x%llx hash_key2=0x%llx\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

450

dev_dbg(rvu->dev, "%s: hash=%x\n", __func__, hash);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

465

static int rvu_npc_exact_alloc_mem_table_entry(struct rvu *rvu, u8 *way,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

471

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

483

dev_dbg(rvu->dev, "%s: mem table entry alloc success (way=%d index=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

492

dev_dbg(rvu->dev, "%s: No space in 4 way exact way, weight=%u\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

502

static void rvu_npc_exact_free_id(struct rvu *rvu, u32 seq_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

506

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

510

dev_dbg(rvu->dev, "%s: freed id %d\n", __func__, seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

519

static bool rvu_npc_exact_alloc_id(struct rvu *rvu, u32 *seq_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

524

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

530

dev_err(rvu->dev, "%s: No space in id bitmap (%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

541

dev_dbg(rvu->dev, "%s: Allocated id (%d)\n", __func__, *seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

552

static int rvu_npc_exact_alloc_cam_table_entry(struct rvu *rvu, int *index)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

557

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

563

dev_info(rvu->dev, "%s: No space in exact cam table, weight=%u\n", __func__,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

573

dev_dbg(rvu->dev, "%s: cam table entry alloc success (index=%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

587

static u64 rvu_exact_prepare_table_entry(struct rvu *rvu, bool enable,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

612

static void rvu_exact_config_secret_key(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

616

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

617

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET0(NIX_INTF_RX),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

620

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET1(NIX_INTF_RX),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

623

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_SECRET2(NIX_INTF_RX),

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

631

static void rvu_exact_config_search_key(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

636

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

659

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_CFG(NIX_INTF_RX), reg_val);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

669

static void rvu_exact_config_result_ctrl(struct rvu *rvu, uint32_t depth)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

674

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

677

rvu->hw->table->mem_table.hash_mask = (depth - 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

681

rvu->hw->table->mem_table.hash_offset = 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

685

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_RESULT_CTL(NIX_INTF_RX), reg);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

693

static void rvu_exact_config_table_mask(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

698

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

710

rvu->hw->table->mem_table.mask = mask;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

713

rvu_write64(rvu, blkaddr, NPC_AF_INTFX_EXACT_MASK(NIX_INTF_RX), mask);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

721

u32 rvu_npc_exact_get_max_entries(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

725

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

734

bool rvu_npc_exact_has_match_table(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

736

return rvu->hw->cap.npc_exact_match_enabled;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

748

__rvu_npc_exact_find_entry_by_seq_id(struct rvu *rvu, u32 seq_id)

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

750

struct npc_exact_table *table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

784

static int rvu_npc_exact_add_to_list(struct rvu *rvu, enum npc_exact_opc_type opc_type, u8 ways,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

789

struct npc_exact_table *table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

794

if (!rvu_npc_exact_alloc_id(rvu, seq_id)) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

795

dev_err(rvu->dev, "%s: Generate seq id failed\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

801

rvu_npc_exact_free_id(rvu, *seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

802

dev_err(rvu->dev, "%s: Memory allocation failed\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

821

rvu_npc_exact_free_id(rvu, *seq_id);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

823

dev_err(rvu->dev, "%s: Unknown opc type%d\n", __func__, opc_type);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

872

static void rvu_npc_exact_mem_table_write(struct rvu *rvu, int blkaddr, u8 ways,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

875

rvu_write64(rvu, blkaddr, NPC_AF_EXACT_MEM_ENTRY(ways, index), mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

885

static void rvu_npc_exact_cam_table_write(struct rvu *rvu, int blkaddr,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

888

rvu_write64(rvu, blkaddr, NPC_AF_EXACT_CAM_ENTRY(index), mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

899

static int rvu_npc_exact_dealloc_table_entry(struct rvu *rvu, enum npc_exact_opc_type opc_type,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

902

int blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

908

u64 null_mdata = rvu_exact_prepare_table_entry(rvu, false, 0, 0, null_dmac);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

910

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

921

dev_err(rvu->dev, "%s: Trying to free an unused entry ways=%d index=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

926

rvu_npc_exact_cam_table_write(rvu, blkaddr, index, null_mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

935

dev_err(rvu->dev, "%s: Trying to free an unused entry index=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

940

rvu_npc_exact_mem_table_write(rvu, blkaddr, ways, index, null_mdata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

946

dev_err(rvu->dev, "%s: invalid opc type %d", __func__, opc_type);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

952

dev_dbg(rvu->dev, "%s: Successfully deleted entry (index=%d, ways=%d opc_type=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

973

static int rvu_npc_exact_alloc_table_entry(struct rvu *rvu, char *mac, u16 chan, u8 ctype,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

980

table = rvu->hw->table;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

983

hash = rvu_exact_calculate_hash(rvu, chan, ctype, mac, table->mem_table.mask,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

985

err = rvu_npc_exact_alloc_mem_table_entry(rvu, ways, index, hash);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

988

dev_dbg(rvu->dev, "%s: inserted in 4 ways hash table ways=%d, index=%d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

993

dev_dbg(rvu->dev, "%s: failed to insert in 4 ways hash table\n", __func__);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

997

err = rvu_npc_exact_alloc_cam_table_entry(rvu, index);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

208

bool rvu_npc_exact_has_match_table(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

209

u32 rvu_npc_exact_get_max_entries(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

210

int rvu_npc_exact_init(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

211

int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

214

int rvu_npc_exact_mac_addr_update(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

218

int rvu_npc_exact_mac_addr_add(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

222

int rvu_npc_exact_mac_addr_del(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

226

int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

229

void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

231

bool rvu_npc_exact_can_disable_feature(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

232

void rvu_npc_exact_disable_feature(struct rvu *rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

233

void rvu_npc_exact_reset(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

234

u16 rvu_npc_exact_drop_rule_to_pcifunc(struct rvu *rvu, u32 drop_rule_idx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

235

int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

236

int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

27

rvu_write64(rvu, blkaddr, \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

31

rvu_write64(rvu, blkaddr, \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

35

rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_RESULT_CTRL(intf, ld))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

38

rvu_read64(rvu, blkaddr, NPC_AF_INTFX_HASHX_MASKX(intf, ld, mask_idx))

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

41

rvu_write64(rvu, blkaddr, \

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

55

void npc_update_field_hash(struct rvu *rvu, u8 intf,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

63

void npc_config_secret_key(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h

64

void npc_program_mkex_hash(struct rvu *rvu, int blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

642

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

650

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

658

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

666

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

674

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

682

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

690

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

698

if (rvu->hw->npc_ext_set) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

105

spin_lock(&rvu->rep_evtq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

106

list_add_tail(&qentry->node, &rvu->rep_evtq_head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

107

spin_unlock(&rvu->rep_evtq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

108

queue_work(rvu->rep_evt_wq, &rvu->rep_evt_work);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

112

int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

117

if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)))

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

120

pf = rvu_get_pf(rvu->pdev, rvu->rep_pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

122

mutex_lock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

123

req = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

125

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

129

req->hdr.pcifunc = rvu->rep_pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

134

otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

135

otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

137

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

142

rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, reg))

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

145

rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, reg))

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

147

int rvu_mbox_handler_nix_lf_stats(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

156

err = nix_get_nixlf(rvu, pcifunc, &nixlf, &blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

162

return rvu_mbox_handler_nix_stats_rst(rvu, &rst_req, &rst_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

184

static u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

188

for (id = 0; id < rvu->rep_cnt; id++)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

189

if (rvu->rep2pfvf_map[id] == pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

19

*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid) \

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

194

static int rvu_rep_tx_vlan_cfg(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

209

err = rvu_mbox_handler_nix_vtag_cfg(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

211

dev_err(rvu->dev, "Tx vlan config failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

218

static int rvu_rep_rx_vlan_cfg(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

231

return rvu_mbox_handler_nix_vtag_cfg(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

234

static int rvu_rep_install_rx_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

24

&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

242

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

245

rep_id = rvu_rep_get_vlan_id(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

248

req.vf = rvu->rep_pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

257

rvu_rep_rx_vlan_cfg(rvu, req.vf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

272

return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

275

static int rvu_rep_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

285

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

286

vlan_tci = rvu_rep_get_vlan_id(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

290

err = rvu_rep_tx_vlan_cfg(rvu, pcifunc, vlan_tci, &vidx);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

299

req.vf = rvu->rep_pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

311

return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

314

int rvu_rep_install_mcam_rules(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

316

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

318

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

325

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

328

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

329

rvu_get_nix_blkaddr(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

332

err = rvu_rep_install_rx_rule(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

338

err = rvu_rep_install_tx_rule(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

346

rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

348

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, vf + 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

349

rvu_get_nix_blkaddr(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

352

err = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

357

err = rvu_rep_install_rx_rule(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

36

static int rvu_rep_up_notify(struct rvu *rvu, struct rep_event *event)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

364

err = rvu_rep_install_tx_rule(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

376

spin_lock_init(&rvu->rep_evtq_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

377

INIT_LIST_HEAD(&rvu->rep_evtq_head);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

378

INIT_WORK(&rvu->rep_evt_work, rvu_rep_wq_handler);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

379

rvu->rep_evt_wq = alloc_workqueue("rep_evt_wq", WQ_PERCPU, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

38

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, event->pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

380

if (!rvu->rep_evt_wq) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

381

dev_err(rvu->dev, "REP workqueue allocation failed\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

387

void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

389

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

390

struct npc_mcam *mcam = &rvu->hw->mcam;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

398

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

403

rvu_switch_enable_lbk_link(rvu, pcifunc, ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

407

npc_enable_mcam_entry(rvu, mcam, blkaddr, entry, ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

412

int rvu_rep_pf_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

414

u16 pcifunc = rvu->rep_pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

417

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

419

rvu_switch_enable_lbk_link(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

42

pf = rvu_get_pf(rvu->pdev, event->pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

420

rvu_rep_rx_vlan_cfg(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

424

int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct esw_cfg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

427

if (req->hdr.pcifunc != rvu->rep_pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

430

rvu->rep_mode = req->ena;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

432

if (!rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

433

rvu_npc_free_mcam_entries(rvu, req->hdr.pcifunc, -1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

438

int rvu_mbox_handler_get_rep_cnt(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

444

rvu->rep_pcifunc = req->hdr.pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

445

rsp->rep_cnt = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

446

rvu->rep_cnt = rsp->rep_cnt;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

448

rvu->rep2pfvf_map = devm_kzalloc(rvu->dev, rvu->rep_cnt *

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

450

if (!rvu->rep2pfvf_map)

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

453

for (pf = 0; pf < rvu->hw->total_pfs; pf++) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

454

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

456

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

457

rvu->rep2pfvf_map[rep] = pcifunc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

460

rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

462

rvu->rep2pfvf_map[rep] = pcifunc |

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

464

rsp->rep_pf_map[rep] = rvu->rep2pfvf_map[rep];

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

47

mutex_lock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

48

msg = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

50

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

59

otx2_mbox_wait_for_zero(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

61

otx2_mbox_msg_send_up(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

63

otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, pf);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

65

mutex_unlock(&rvu->mbox_lock);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

71

struct rvu *rvu = container_of(work, struct rvu, rep_evt_work);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

77

spin_lock_irqsave(&rvu->rep_evtq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

78

qentry = list_first_entry_or_null(&rvu->rep_evtq_head,

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

84

spin_unlock_irqrestore(&rvu->rep_evtq_lock, flags);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

90

rvu_rep_up_notify(rvu, event);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

95

int rvu_mbox_handler_rep_event_notify(struct rvu *rvu, struct rep_event *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

100

dev_info(rvu->dev, "AF: SDP%d max_vfs %d num_pf_rings %d pf_srn %d\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

107

rvu_mbox_handler_get_sdp_chan_info(struct rvu *rvu, struct msg_req *req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

110

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

117

blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

119

rsp->num_chan = rvu_read64(rvu, blkaddr, NIX_AF_CONST1) & 0xFFFUL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

20

bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

22

u16 pf = rvu_get_pf(rvu->pdev, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

37

bool is_sdp_pf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

39

return (is_sdp_pfvf(rvu, pcifunc) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

44

bool is_sdp_vf(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

47

return (rvu->vf_devid == RVU_SDP_VF_DEVID);

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

49

return (is_sdp_pfvf(rvu, pcifunc) &&

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

53

int rvu_sdp_init(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

59

if (rvu->fwdata && rvu->fwdata->channel_data.valid) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

61

pfvf = &rvu->pf[sdp_pf_num[0]];

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

62

pfvf->sdp_info = &rvu->fwdata->channel_data.info;

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

72

pfvf = &rvu->pf[sdp_pf_num[i]];

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

74

pfvf->sdp_info = devm_kzalloc(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

82

dev_info(rvu->dev, "SDP PF number:%d\n", sdp_pf_num[i]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

93

rvu_mbox_handler_set_sdp_chan_info(struct rvu *rvu,

drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c

97

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

103

rvu_get_nix_blkaddr(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

11

void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool enable)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

111

err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

113

dev_err(rvu->dev, "RX rule for PF%d failed(%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

118

err = rvu_switch_install_tx_rule(rvu, pcifunc, start + entry);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

120

dev_err(rvu->dev, "TX rule for PF%d failed(%d)\n",

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

127

rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

129

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

13

struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

130

rvu_get_nix_blkaddr(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

132

err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

134

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

140

err = rvu_switch_install_tx_rule(rvu, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

143

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

156

void rvu_switch_enable(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

16

nix_hw = get_nix_hw(rvu->hw, pfvf->nix_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

163

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

168

alloc_req.count = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

169

if (rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

171

ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &alloc_req,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

174

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

18

rvu_nix_tx_tl2_cfg(rvu, pfvf->nix_blkaddr, pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

180

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

194

if (rvu->rep_mode) {

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

195

rvu_rep_pf_init(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

196

ret = rvu_rep_install_mcam_rules(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

198

ret = rvu_switch_install_rules(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

208

rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

212

rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

217

void rvu_switch_disable(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

22

static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

222

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

223

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

232

if (rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

236

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

239

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

240

err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

242

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

247

rvu_switch_enable_lbk_link(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

249

rvu_get_pf_numvfs(rvu, pf, &numvfs, NULL);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

251

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, (vf + 1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

252

err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

254

dev_err(rvu->dev,

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

258

rvu_switch_enable_lbk_link(rvu, pcifunc, false);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

266

rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &uninstall_rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

267

rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

272

void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

274

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

278

if (rvu->rep_mode)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

279

return rvu_rep_update_rules(rvu, pcifunc, ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

29

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

292

rvu_switch_install_tx_rule(rvu, pcifunc, rswitch->start_entry + entry);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

293

rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

48

return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

51

static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

58

pfvf = rvu_get_pfvf(rvu, pcifunc);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

66

rvu_switch_enable_lbk_link(rvu, pcifunc, true);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

80

return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

83

static int rvu_switch_install_rules(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

85

struct rvu_switch *rswitch = &rvu->rswitch;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

87

struct rvu_hwinfo *hw = rvu->hw;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

93

if (!is_pf_cgxmapped(rvu, pf))

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c

96

pcifunc = rvu_make_pcifunc(rvu->pdev, pf, 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h

9

#define TRACE_SYSTEM rvu