rtw_write16
rtw_write16(rtwdev, REG_ASSOCIATED_BFMER0_INFO + 6, param->paid);
rtw_write16(rtwdev, REG_TX_CSI_RPT_PARAM_BW20, param->csi_para);
rtw_write16(rtwdev, REG_WMAC_MU_BF_CTL, mu_bf_ctl);
rtw_write16(rtwdev, REG_WMAC_MU_BF_CTL, 0);
rtw_write16(rtwdev, addr_csi_rpt, csi_param);
rtw_write16(rtwdev, REG_ASSOCIATED_BFMER0_INFO + 4, 0);
rtw_write16(rtwdev, REG_TX_CSI_RPT_PARAM_BW20, 0);
rtw_write16(rtwdev, REG_ASSOCIATED_BFMER1_INFO + 4, 0);
rtw_write16(rtwdev, REG_TX_CSI_RPT_PARAM_BW20 + 2, 0);
rtw_write16(rtwdev, REG_WMAC_MU_BF_CTL, 0);
rtw_write16(rtwdev, REG_RRSR, cur_rrsr);
rtw_write16(rtwdev, REG_RRSR, cur_rrsr);
rtw_write16(rtwdev, REG_WIFI_BT_INFO, BIT_BT_INT_EN);
rtw_write16(rtwdev, REG_WIFI_BT_INFO, val);
rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808);
rtw_write16(rtwdev, REG_RETRY_LIMIT, coex_stat->retry_limit);
rtw_write16(rtwdev, addr, (u16)val);
rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, pg_addr);
rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2,
rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl);
rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl);
rtw_write16(rtwdev, addr, val | bit);
rtw_write16(rtwdev, addr, val & ~bit);
rtw_write16(rtwdev, REG_TXDMA_PQ_MAP, txdma_pq_map);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, pg_tbl->hq_num);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_2, pg_tbl->lq_num);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_3, pg_tbl->nq_num);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_4, pg_tbl->exq_num);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_5, pubq_num);
rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2, fifo->rsvd_boundary);
rtw_write16(rtwdev, REG_BCNQ_BDNY_V1, fifo->rsvd_boundary);
rtw_write16(rtwdev, REG_FIFOPAGE_CTRL_2 + 2, fifo->rsvd_boundary);
rtw_write16(rtwdev, REG_BCNQ1_BDNY_V1, fifo->rsvd_boundary);
rtw_write16(rtwdev, REG_TRXFF_BNDY + 2, chip->rxff_size - REPORT_BUF - 1);
rtw_write16(rtwdev, REG_CR, 0x2ff);
rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, 0x200);
rtw_write16(rtwdev, REG_MCUFW_CTRL, val);
rtw_write16(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
rtw_write16(rtwdev, RTK_PCI_RXBD_IDX_MPDUQ, ring->r.rp);
rtw_write16(rtwdev, REG_DBI_FLAG_V1, write_addr);
rtw_write16(rtwdev, REG_DBI_FLAG_V1, read_addr);
rtw_write16(rtwdev, REG_MDIO_V1, data);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_H2CQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BKQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BEQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VOQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VIQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_MGMTQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_HI0Q, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, RTK_PCI_RXBD_NUM_MPDUQ, len & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, bd_idx, ring->r.wp & TRX_BD_IDX_MASK);
rtw_write16(rtwdev, REG_SPEC_SIFS, WLAN_SPEC_SIFS);
rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, WLAN_SPEC_SIFS);
rtw_write16(rtwdev, REG_SIFS, WLAN_SPEC_SIFS); /* CCK */
rtw_write16(rtwdev, REG_SIFS + 2, WLAN_SPEC_SIFS); /* OFDM */
rtw_write16(rtwdev, REG_RETRY_LIMIT, WLAN_RL_VAL);
rtw_write16(rtwdev, REG_ATIMWND, 0x2);
rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x80);
rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x200);
rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x280);
rtw_write16(rtwdev, REG_BB_SEL_BTG, 0x0);
rtw_write16(rtwdev, REG_RETRY_LIMIT, WLAN_RL_VAL);
rtw_write16(rtwdev, REG_NAV_PROT_LEN, WLAN_NAV_PROT_LEN);
rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, WLAN_SPEC_SIFS);
rtw_write16(rtwdev, REG_SIFS, WLAN_SPEC_SIFS);
rtw_write16(rtwdev, REG_SIFS + 2, WLAN_SPEC_SIFS);
rtw_write16(rtwdev, REG_RXFLTMAP0, WLAN_RX_FILTER0);
rtw_write16(rtwdev, REG_RXFLTMAP1, WLAN_RX_FILTER1);
rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2);
rtw_write16(rtwdev, REG_CR,
rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);
rtw_write16(rtwdev, REG_RXFLTMAP0, 0xffff);
rtw_write16(rtwdev, REG_RXFLTMAP1, 0x0400);
rtw_write16(rtwdev, REG_RXFLTMAP2, 0xffff);
rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);
rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);
rtw_write16(rtwdev, REG_SIFS, 0x100a);
rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);
rtw_write16(rtwdev, REG_BCN_CTRL,
rtw_write16(rtwdev, REG_BCNTCFG, 0x4413);
rtw_write16(rtwdev, 0xf002, 0);
rtw_write16(rtwdev, REG_WMAC_TRXPTCL_CTL, val16);
rtw_write16(rtwdev, REG_BAR_MODE_CTRL + 2,
rtw_write16(rtwdev, REG_TXPAUSE, 0);
rtw_write16(rtwdev, REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT);
rtw_write16(rtwdev, REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT);
rtw_write16(rtwdev, REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2);
rtw_write16(rtwdev, REG_BAR_MODE_CTRL + 2,
rtw_write16(rtwdev, REG_TXPAUSE, 0x0000);
rtw_write16(rtwdev, REG_EDCA_VO_PARAM + 2, WLAN_VO_TXOP_LIMIT);
rtw_write16(rtwdev, REG_EDCA_VI_PARAM + 2, WLAN_VI_TXOP_LIMIT);
rtw_write16(rtwdev, REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2);
rtw_write16(rtwdev, REG_SPEC_SIFS, WLAN_SIFS_DUR_TUNE);
rtw_write16(rtwdev, REG_RESP_SIFS_CCK,
rtw_write16(rtwdev, REG_RESP_SIFS_OFDM,
rtw_write16(rtwdev, REG_BAR_MODE_CTRL + 2,
rtw_write16(rtwdev, REG_TXPAUSE, 0x0000);
rtw_write16(rtwdev, REG_RXTSF_OFFSET_CCK, WLAN_RX_TSF_CFG);
rtw_write16(rtwdev, REG_EIFS, WLAN_EIFS_DUR_TUNE);
rtw_write16(rtwdev, REG_RXFLTMAP2, WLAN_RX_FILTER2);
rtw_write16(rtwdev, REG_RXPSF_CTRL + 2, value16);
rtw_write16(rtwdev, REG_RXPSF_CTRL, value16);
rtw_write16(rtwdev, REG_RXPSF_CTRL, value16);
rtw_write16(rtwdev, REG_TRXFF_BNDY + 2,
rtw_write16(rtwdev, REG_RXDMA_STATUS, 0x7400);
rtw_write16(rtwdev, REG_MAX_AGGR_NUM, 0x1f1f);
rtw_write16(rtwdev, REG_MAX_AGGR_NUM, 0x1f1f);
rtw_write16(rtwdev, REG_TX_RPT_TIME, 0x3df0);
rtw_write16(rtwdev, REG_WMAC_TRXPTCL_CTL, val16);
rtw_write16(rtwdev, REG_CR, 0);
rtw_write16(rtwdev, REG_CR, 0);
rtw_write16(rtwdev, REG_TXDMA_PQ_MAP, txdma_pq_map);
rtw_write16(rtwdev, REG_RXFLTMAP0, 0xffff);
rtw_write16(rtwdev, REG_RXFLTMAP1, 0x0400);
rtw_write16(rtwdev, REG_RXFLTMAP2, 0xffff);
rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x3030);
rtw_write16(rtwdev, REG_SPEC_SIFS, 0x100a);
rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, 0x100a);
rtw_write16(rtwdev, REG_SIFS, 0x100a);
rtw_write16(rtwdev, REG_SIFS + 2, 0x100a);
rtw_write16(rtwdev, REG_BCN_CTRL, val16);
rtw_write16(rtwdev, REG_BCNTCFG, 0x4413);
rtw_write16(rtwdev, REG_APS_FSMCO, ori_fsmc0 & ~APS_FSMCO_HW_POWERDOWN);
rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH,
rtw_write16(rtwdev, REG_CR, ctrl_reg);
rtw_write16(rtwdev, RTW_SEC_CONFIG, sec_config);
rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, val16);
rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, val16);
rtw_write16(rtwdev, reg, (u16)val);
rtw_write16(padapter, 0x34, rtw_read16(padapter, 0x34) & (~BIT11));
rtw_write16(padapter, RegAddr, Data);
rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
rtw_write16(pDM_Odm->Adapter, ODM_REG_NHM_TIMER_11N+2, 0x2710); /* 0x894[31:16]= 0x2710 Time duration for NHM unit: 4us, 0x2710 =40ms */
rtw_write16(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); /* 0x890[31:16]= 0xffff th_9, th_10 */
rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
rtw_write16(padapter, REG_RXFLTMAP1, 0x0400);
rtw_write16(padapter, REG_BCNTCFG, 0x00);
rtw_write16(padapter, REG_TBTT_PROHIBIT, 0xff04);
rtw_write16(padapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
rtw_write16(padapter, REG_RXFLTMAP2, 0);
rtw_write16(padapter, REG_RXFLTMAP2, value_rxfltmap2);
rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
rtw_write16(padapter, REG_RRSR, pHalData->RegRRSR);
rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
rtw_write16(padapter, REG_RL, val16);
rtw_write16(padapter, REG_RRSR, BrateCfg);
rtw_write16(padapter, REG_BCN_INTERVAL, *((u16 *)val));
rtw_write16(padapter, REG_RQPN_NPQ, 0);
rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16);
rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
rtw_write16(padapter, REG_BCN_CTRL, val16);
rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
rtw_write16(padapter, REG_BCNTCFG, 0x660F);
rtw_write16(padapter, REG_ATIMWND, 2);
rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (RegRfMod_BW & 0xFE7F)); /* BIT 7 = 0, BIT 8 = 0 */
rtw_write16(Adapter, REG_TRXPTCL_CTL_8723B, (u2tmp & 0xFEFF)); /* BIT 7 = 1, BIT 8 = 0 */
rtw_write16(padapter, REG_PWR_DATA, value16);
rtw_write16(padapter, 0x218, HQ_threshold);
rtw_write16(padapter, 0x21A, NQ_threshold);
rtw_write16(padapter, 0x21C, LQ_threshold);
rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
rtw_write16(padapter, REG_RXFLTMAP2, value16);
rtw_write16(padapter, REG_RXFLTMAP1, value16);
rtw_write16(padapter, REG_RXFLTMAP0, value16);
rtw_write16(padapter, REG_SPEC_SIFS, value16);
rtw_write16(padapter, REG_RL, value16);
rtw_write16(padapter, REG_SPEC_SIFS, 0x100a);
rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a);
rtw_write16(padapter, REG_SIFS_CTX, 0x100a);
rtw_write16(padapter, REG_SIFS_TRX, 0x100a);
rtw_write16(padapter, REG_APS_FSMCO, value16);
rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
rtw_write16(padapter, REG_CR, value16);
extern int rtw_write16(struct adapter *adapter, u32 addr, u16 val);