CR97
via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
viafb_write_reg_mask(CR97, VIACR,
viafb_write_reg_mask(CR97, VIACR,
viafb_write_reg_mask(CR97, VIACR, 0x84,
dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f;
viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
{VIACR, CR97, 0xFF, 0x03}, /* DFP high ; DFPH Clock Skew */
{VIACR, CR97, 0xFF, 0x00},
{VIACR, CR97, 0xFF, 0x00},
{VIACR, CR97, 0xFF, 0x00},
{VIACR, CR97, 0xFF, 0x00},