CR96
viafb_write_reg_mask(CR96, VIACR, 0x03,
viafb_write_reg_mask(CR96, VIACR, 0x07,
viafb_write_reg_mask(CR96, VIACR, 0x07,
viafb_write_reg_mask(CR96, VIACR,
dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f;
viafb_write_reg_mask(CR96, VIACR,
{VIACR, CR96, 0xFF, 0x03}, /* DVP0 ; DVP0 Clock Skew */
{VIACR, CR96, 0xFF, 0x00},
{VIACR, CR96, 0xFF, 0x00},
{VIACR, CR96, 0xFF, 0x00},
{VIACR, CR96, 0xFF, 0x00},