CR91
unsigned char CR90, CR91, CRB0;
reg->CR91 = reg->CRTC[19] = 0xff & width;
vga_out8(0x3d5, reg->CR91, par);
reg->CR91 = vga_in8(0x3d5, par);
vga_out8(0x3d5, reg->CR91, par);
RegCR91 = viafb_read_reg(VIACR, CR91);
viafb_write_reg(CR91, VIACR, 0x1D);
RegCR91 = viafb_read_reg(VIACR, CR91);
viafb_write_reg(CR91, VIACR, 0x1D);
viafb_write_reg(CR91, VIACR, RegCR91);
viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f);
viafb_write_reg_mask(CR91, VIACR, 0, BIT7);
viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
viafb_write_reg_mask(CR91, VIACR, 0, BIT0);
viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80);
viafb_write_reg(CR91, VIACR, 0x00);
viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80);
viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */