rtw89_reg5_def
_rfk_write_rf(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def)
_rfk_write32_mask(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def)
_rfk_write32_set(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def)
_rfk_write32_clr(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def)
_rfk_delay(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def)
(*_rfk_handler[])(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) = {
const struct rtw89_reg5_def *p = tbl->defs;
const struct rtw89_reg5_def *end = tbl->defs + tbl->size;
const struct rtw89_reg5_def *defs;
static const struct rtw89_reg5_def rtw8851b_iqk_txk_5ghz_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_afebb_restore_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_macbb_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_macbb_bh_defs[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_sys_defs[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_sys_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_sys_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_init_txpwr_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_init_txpwr_he_tb_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_dck_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_dac_gain_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_dadck_post_defs[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_slope_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_slope_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_align_a_2g_defs[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_align_a_5g_defs[] = {
static const struct rtw89_reg5_def rtw8851b_dack_s0_1_defs[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_track_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_tssi_mv_avg_defs_a[] = {
static const struct rtw89_reg5_def rtw8851b_nctl_post_defs[] = {
static const struct rtw89_reg5_def rtw8851b_dack_s0_2_defs[] = {
static const struct rtw89_reg5_def rtw8851b_dack_manual_off_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_rxclk_80_defs[] = {
static const struct rtw89_reg5_def rtw8851b_dadck_setup_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_rxclk_others_defs[] = {
static const struct rtw89_reg5_def rtw8851b_iqk_txk_2ghz_defs[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_s_defs_ab[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_ab[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_f[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_r[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_dpk_pas_read_defs[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_nondbcc_path01[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path0[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path1[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_nondbcc_path01[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path0[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path1[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_2g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_1[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_3[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_4[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_2g[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_1[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_3[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_4[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_a[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_b[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_disable_defs[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_ab[] = {
static const struct rtw89_reg5_def rtw8852a_tssi_tracking_defs[] = {
static const struct rtw89_reg5_def rtw8852a_rfk_afe_init_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s0_2_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s0_3_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s1_1_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s1_2_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s1_3_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dpk_afe_defs[] = {
static const struct rtw89_reg5_def rtw8852b_dpk_afe_restore_defs[] = {
static const struct rtw89_reg5_def rtw8852b_check_addc_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_dpk_kip_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_sys_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_check_addc_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_afe_init_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_all_defs[] = {
static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_part_defs[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_b[] = {
static const struct rtw89_reg5_def rtw8852b_dack_s0_1_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_defs_b[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_he_tb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_he_tb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_dck_defs_a[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_dck_defs_b[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_dac_gain_defs_a[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_dac_gain_defs_b[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_sys_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_a_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_b_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_b_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_2g_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g1_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_sys_a_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g2_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_a_5g3_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_2g_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g1_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g2_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_align_b_5g3_all_defs[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_sys_b_defs_2g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_slope_defs_b[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_sys_b_defs_5g[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_init_txpwr_defs_a[] = {
static const struct rtw89_reg5_def rtw8852bt_tssi_sys_defs[] = {
static const struct rtw89_reg5_def rtw8852c_read_rxsram_post_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order0_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order1_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order2_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_mdpd_order3_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_kip_pwr_clk_on_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dpk_kip_pwr_clk_off_defs[] = {
static const struct rtw89_reg5_def rtw8852c_dack_reset_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_2g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_2g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_5g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_sys_defs_5g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_dack_reset_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_dack_defs_s0[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txpwr_ctrl_bb_he_tb_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_2g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_2g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_5g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_dck_defs_5g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_bbgain_split_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_bbgain_split_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_2g_a[] = {
static const struct rtw89_reg5_def rtw8852c_dack_defs_s1[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_2g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_5g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_cal_org_defs_5g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_2g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_2g_b[] = {
static const struct rtw89_reg5_def rtw8852c_drck_defs[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_5g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_5g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_6g_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_set_aligk_default_defs_6g_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_iqk_rxk_cfg_defs[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_slope_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_iqk_afebb_restore_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_run_slope_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_run_slope_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_dack_reload_defs[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_track_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_track_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txagc_ofst_mv_avg_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_txagc_ofst_mv_avg_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_enable_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_enable_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_disable_defs_a[] = {
static const struct rtw89_reg5_def rtw8852c_tssi_disable_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_iqk_afebb_restore_defs_b[] = {
static const struct rtw89_reg5_def rtw8852c_read_rxsram_pre_defs[] = {