Symbol: CR
arch/arm/mach-rpc/dma.c
181
writeb(DMA_CR_C, base + CR);
arch/arm/mach-rpc/dma.c
188
writeb(ctrl, base + CR);
arch/arm/mach-rpc/dma.c
201
writeb(0, base + CR);
arch/arm/mach-spear/time.c
116
val = readw(gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
118
writew(val, gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
135
val = readw(gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
138
writew(val, gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
157
u16 val = readw(gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
160
writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
165
writew(val, gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
186
writew(CTRL_PRESCALER16, gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
75
writew(CTRL_PRESCALER256, gpt_base + CR(CLKSRC));
arch/arm/mach-spear/time.c
83
val = readw(gpt_base + CR(CLKSRC));
arch/arm/mach-spear/time.c
86
writew(val, gpt_base + CR(CLKSRC));
arch/arm/mach-spear/time.c
95
u16 val = readw(gpt_base + CR(CLKEVT));
arch/arm/mach-spear/time.c
99
writew(val, gpt_base + CR(CLKEVT));
arch/powerpc/xmon/ppc-opc.c
274
#define CRB CR + 1
arch/powerpc/xmon/ppc-opc.c
3892
{"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3893
{"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3894
{"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3895
{"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3896
{"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3897
{"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3898
{"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3899
{"bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3900
{"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3901
{"bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3902
{"bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3903
{"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3904
{"bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3905
{"bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3906
{"bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3907
{"bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3908
{"bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3909
{"bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3910
{"bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3911
{"bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3912
{"bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3913
{"bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3914
{"bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3915
{"bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3916
{"ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3917
{"ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3918
{"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3919
{"bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3920
{"bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3921
{"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3922
{"blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3923
{"blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3924
{"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3925
{"bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3926
{"bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3927
{"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3928
{"blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3929
{"blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3930
{"blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3931
{"bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3932
{"bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3933
{"bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3934
{"blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3935
{"blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3936
{"blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3937
{"bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3938
{"bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3939
{"bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3940
{"bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3941
{"bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3942
{"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3943
{"bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3944
{"bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3945
{"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3946
{"bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3947
{"bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3948
{"bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3949
{"bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3950
{"bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3951
{"bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3952
{"bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3953
{"bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3954
{"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3955
{"bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3956
{"bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3957
{"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3958
{"bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3959
{"bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3960
{"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3961
{"bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3962
{"bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3963
{"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3964
{"bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3965
{"bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3966
{"bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3967
{"bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3968
{"bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3969
{"bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3970
{"bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3971
{"bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3972
{"bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3973
{"bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3974
{"bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3975
{"bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3977
{"blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3978
{"blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3979
{"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3980
{"bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3981
{"bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3982
{"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3983
{"blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3984
{"blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3985
{"blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3986
{"bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3987
{"bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3988
{"bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3989
{"bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3990
{"bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3991
{"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3992
{"bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
3993
{"bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
3994
{"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
3995
{"bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3996
{"bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
3997
{"bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
3998
{"bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
3999
{"bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4000
{"bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4001
{"beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4002
{"beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4003
{"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4004
{"beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4005
{"beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4006
{"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4007
{"beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4008
{"beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4009
{"beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4010
{"beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4011
{"beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4012
{"beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4013
{"bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4014
{"bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4015
{"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4016
{"bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4017
{"bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4018
{"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4019
{"bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4020
{"bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4021
{"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4022
{"bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
arch/powerpc/xmon/ppc-opc.c
4023
{"bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
arch/powerpc/xmon/ppc-opc.c
4024
{"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
arch/powerpc/xmon/ppc-opc.c
4025
{"bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4026
{"bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4027
{"bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4028
{"buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4029
{"buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4030
{"buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4031
{"bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4032
{"bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4033
{"bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4034
{"bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4035
{"bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4036
{"bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
arch/powerpc/xmon/ppc-opc.c
4176
{"bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4177
{"bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4178
{"bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4179
{"bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4180
{"bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4181
{"bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4182
{"bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4183
{"bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4184
{"bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4185
{"bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4186
{"bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4187
{"bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4188
{"blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4189
{"blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4190
{"bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4191
{"bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4192
{"bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4193
{"bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4194
{"blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4195
{"blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4196
{"blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4197
{"bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4198
{"bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4199
{"bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4200
{"bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4201
{"bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4202
{"bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4203
{"bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4204
{"bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4205
{"bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4206
{"bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4207
{"bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4208
{"bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4209
{"bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4210
{"bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4211
{"bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4212
{"bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4213
{"bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4214
{"bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4215
{"bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4216
{"bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4217
{"bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4218
{"bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4219
{"bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4220
{"blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4221
{"bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4222
{"blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4223
{"bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4224
{"bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4225
{"bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4226
{"bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4227
{"bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4228
{"bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4229
{"bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4230
{"bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4231
{"bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4232
{"bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4233
{"bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4234
{"blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4235
{"bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4236
{"blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4237
{"bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4238
{"bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4239
{"bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4240
{"bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4241
{"bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4242
{"bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4243
{"bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4244
{"bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4245
{"bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4246
{"bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4247
{"bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4248
{"blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4249
{"bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4250
{"blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4251
{"bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4252
{"bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4253
{"bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4254
{"bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4255
{"bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4256
{"bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4257
{"bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4258
{"bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4259
{"bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4260
{"bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4261
{"bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4262
{"bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4263
{"bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4264
{"bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4265
{"bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4266
{"bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4267
{"bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4268
{"bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4269
{"bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4270
{"beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4271
{"beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4272
{"beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4273
{"beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4274
{"beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4275
{"beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4276
{"bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4277
{"bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4278
{"bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4279
{"bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4280
{"bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4281
{"bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4282
{"bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4283
{"bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4284
{"bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4285
{"bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4286
{"bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4287
{"bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4288
{"bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4289
{"bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4290
{"beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4291
{"beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4292
{"bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4293
{"bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4294
{"bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4295
{"bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4296
{"bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4297
{"bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4298
{"bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4299
{"bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4300
{"beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4301
{"beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4302
{"bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4303
{"bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4304
{"bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4305
{"bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4306
{"bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4307
{"bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4308
{"bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4309
{"bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4310
{"beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4311
{"beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4312
{"bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4313
{"bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4314
{"bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4315
{"bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4428
{"bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4429
{"bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4430
{"bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4431
{"bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4432
{"bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4433
{"bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4434
{"bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4435
{"bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4436
{"blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4437
{"blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4438
{"bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4439
{"bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4440
{"blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4441
{"blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4442
{"bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4443
{"bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4444
{"bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4445
{"bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4446
{"bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4447
{"bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4448
{"bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4449
{"bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4450
{"bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4451
{"bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4452
{"bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4453
{"bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4454
{"bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4455
{"bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4456
{"bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4457
{"bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4458
{"bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4459
{"bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4460
{"blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4461
{"bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4462
{"blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4463
{"bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4464
{"bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4465
{"bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4466
{"bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4467
{"bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4468
{"bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4469
{"bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4470
{"bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4471
{"bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4472
{"bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4473
{"bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4474
{"blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4475
{"bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4476
{"blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4477
{"bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4478
{"bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4479
{"bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4480
{"bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4481
{"bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4482
{"bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4483
{"bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4484
{"bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4485
{"bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4486
{"bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4487
{"bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4488
{"blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4489
{"bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4490
{"blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4491
{"bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4492
{"bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4493
{"bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4494
{"bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4495
{"bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4496
{"bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4497
{"bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4498
{"bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4499
{"bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4500
{"bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4501
{"bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4502
{"bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4503
{"bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4504
{"bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4505
{"bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4506
{"beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4507
{"beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4508
{"beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4509
{"beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4510
{"bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4511
{"bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4512
{"bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4513
{"bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4514
{"bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4515
{"bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4516
{"bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4517
{"bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4518
{"bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4519
{"bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4520
{"bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4521
{"bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4522
{"beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4523
{"beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4524
{"bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4525
{"bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4526
{"bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4527
{"bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4528
{"bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4529
{"bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4530
{"bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4531
{"bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4532
{"beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4533
{"beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4534
{"bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4535
{"bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4536
{"bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4537
{"bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4538
{"bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4539
{"bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4540
{"bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4541
{"bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4542
{"beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4543
{"beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4544
{"bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4545
{"bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4546
{"bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
4547
{"bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR}},
arch/powerpc/xmon/ppc-opc.c
7152
{"e_mcrf", XL(31,16), XL_MASK, PPCVLE, 0, {CRD, CR}},
drivers/iio/adc/at91-sama5d2_adc.c
1540
at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START);
drivers/iio/adc/at91-sama5d2_adc.c
1779
at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START);
drivers/iio/adc/at91-sama5d2_adc.c
2150
at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST);
drivers/iio/adc/at91-sama5d2_adc.c
2515
at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST);
drivers/iio/adc/at91-sama5d2_adc.c
256
.CR = 0x00,
drivers/iio/adc/at91-sama5d2_adc.c
291
.CR = 0x00,
drivers/iio/adc/at91-sama5d2_adc.c
41
u16 CR;
drivers/iommu/msm_iommu_hw-8xxx.h
109
#define GET_CR(b) GET_GLOBAL_REG(CR, (b))
drivers/iommu/msm_iommu_hw-8xxx.h
205
#define SET_RPUE(b, v) SET_GLOBAL_FIELD(b, CR, RPUE, v)
drivers/iommu/msm_iommu_hw-8xxx.h
206
#define SET_RPUERE(b, v) SET_GLOBAL_FIELD(b, CR, RPUERE, v)
drivers/iommu/msm_iommu_hw-8xxx.h
207
#define SET_RPUEIE(b, v) SET_GLOBAL_FIELD(b, CR, RPUEIE, v)
drivers/iommu/msm_iommu_hw-8xxx.h
208
#define SET_DCDEE(b, v) SET_GLOBAL_FIELD(b, CR, DCDEE, v)
drivers/iommu/msm_iommu_hw-8xxx.h
209
#define SET_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR, CLIENTPD, v)
drivers/iommu/msm_iommu_hw-8xxx.h
210
#define SET_STALLD(b, v) SET_GLOBAL_FIELD(b, CR, STALLD, v)
drivers/iommu/msm_iommu_hw-8xxx.h
211
#define SET_TLBLKCRWE(b, v) SET_GLOBAL_FIELD(b, CR, TLBLKCRWE, v)
drivers/iommu/msm_iommu_hw-8xxx.h
212
#define SET_CR_TLBIALLCFG(b, v) SET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG, v)
drivers/iommu/msm_iommu_hw-8xxx.h
213
#define SET_TLBIVMIDCFG(b, v) SET_GLOBAL_FIELD(b, CR, TLBIVMIDCFG, v)
drivers/iommu/msm_iommu_hw-8xxx.h
214
#define SET_CR_HUME(b, v) SET_GLOBAL_FIELD(b, CR, CR_HUME, v)
drivers/iommu/msm_iommu_hw-8xxx.h
322
#define GET_RPUE(b) GET_GLOBAL_FIELD(b, CR, RPUE)
drivers/iommu/msm_iommu_hw-8xxx.h
323
#define GET_RPUERE(b) GET_GLOBAL_FIELD(b, CR, RPUERE)
drivers/iommu/msm_iommu_hw-8xxx.h
324
#define GET_RPUEIE(b) GET_GLOBAL_FIELD(b, CR, RPUEIE)
drivers/iommu/msm_iommu_hw-8xxx.h
325
#define GET_DCDEE(b) GET_GLOBAL_FIELD(b, CR, DCDEE)
drivers/iommu/msm_iommu_hw-8xxx.h
326
#define GET_CLIENTPD(b) GET_GLOBAL_FIELD(b, CR, CLIENTPD)
drivers/iommu/msm_iommu_hw-8xxx.h
327
#define GET_STALLD(b) GET_GLOBAL_FIELD(b, CR, STALLD)
drivers/iommu/msm_iommu_hw-8xxx.h
328
#define GET_TLBLKCRWE(b) GET_GLOBAL_FIELD(b, CR, TLBLKCRWE)
drivers/iommu/msm_iommu_hw-8xxx.h
329
#define GET_CR_TLBIALLCFG(b) GET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG)
drivers/iommu/msm_iommu_hw-8xxx.h
330
#define GET_TLBIVMIDCFG(b) GET_GLOBAL_FIELD(b, CR, TLBIVMIDCFG)
drivers/iommu/msm_iommu_hw-8xxx.h
331
#define GET_CR_HUME(b) GET_GLOBAL_FIELD(b, CR, CR_HUME)
drivers/iommu/msm_iommu_hw-8xxx.h
93
#define SET_CR(b, v) SET_GLOBAL_REG(CR, (b), (v))
drivers/media/pci/solo6x10/solo6x10-regs.h
262
#define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0)
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
3150
XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1);
drivers/net/ethernet/natsemi/ns83820.c
1447
writel(CR_RXE, dev->base + CR);
drivers/net/ethernet/natsemi/ns83820.c
1517
writel(which, dev->base + CR);
drivers/net/ethernet/natsemi/ns83820.c
1520
} while (readl(dev->base + CR) & which);
drivers/net/ethernet/natsemi/ns83820.c
455
#define __kick_rx(dev) writel(CR_RXE, dev->base + CR)
drivers/net/ethernet/natsemi/ns83820.c
949
writel(CR_TXE, dev->base + CR);
drivers/net/usb/rtl8150.c
298
get_registers(dev, CR, 1, &cr);
drivers/net/usb/rtl8150.c
301
set_registers(dev, CR, 1, &cr);
drivers/net/usb/rtl8150.c
310
set_registers(dev, CR, 1, &cr);
drivers/net/usb/rtl8150.c
321
set_registers(dev, CR, 1, &data);
drivers/net/usb/rtl8150.c
323
get_registers(dev, CR, 1, &data);
drivers/net/usb/rtl8150.c
639
set_registers(dev, CR, 1, &cr);
drivers/net/usb/rtl8150.c
649
get_registers(dev, CR, 1, &cr);
drivers/net/usb/rtl8150.c
651
set_registers(dev, CR, 1, &cr);
drivers/phy/freescale/phy-fsl-lynx-28g.c
885
err = lynx_pcvt_rmw(lane, lane_mode, CR(1), 0,
drivers/phy/freescale/phy-fsl-lynx-28g.c
909
err = lynx_pcvt_rmw(lane, lane_mode, CR(1), SGMIIaCR1_SGPCS_EN,
drivers/spi/spi-at91-usart.c
436
at91_usart_spi_writel(aus, CR, US_ENABLE);
drivers/spi/spi-at91-usart.c
448
at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE);
drivers/spi/spi-at91-usart.c
465
at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE);
drivers/spi/spi-atmel.c
1486
spi_writel(as, CR, SPI_BIT(SWRST));
drivers/spi/spi-atmel.c
1487
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
drivers/spi/spi-atmel.c
1491
spi_writel(as, CR, SPI_BIT(FIFOEN));
drivers/spi/spi-atmel.c
1507
spi_writel(as, CR, SPI_BIT(SPIEN));
drivers/spi/spi-atmel.c
1675
spi_writel(as, CR, SPI_BIT(SWRST));
drivers/spi/spi-atmel.c
1676
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
drivers/spi/spi-atmel.c
1708
spi_writel(as, CR, SPI_BIT(SWRST));
drivers/spi/spi-atmel.c
1709
spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
drivers/spi/spi-atmel.c
467
spi_writel(as, CR, SPI_BIT(LASTXFER));
drivers/spi/spi-atmel.c
695
spi_writel(as, CR, SPI_BIT(RXFCLR) | SPI_BIT(TXFCLR));
drivers/tty/n_gsm.c
1113
*--dp = (msg->addr << 2) | CR | EA;
drivers/tty/n_gsm.c
1464
msg->data[0] = (cmd << 1) | CR | EA; /* Set C/R */
drivers/usb/misc/sisusbvga/sisusb_struct.h
112
unsigned char CR[17];
drivers/video/fbdev/sis/init.c
2092
crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
drivers/video/fbdev/sis/init301.c
3357
tempax = SiS_Pr->SiS_CRT1Table[index].CR[0];
drivers/video/fbdev/sis/init301.c
3358
tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8);
drivers/video/fbdev/sis/init301.c
3360
tempbx = SiS_Pr->SiS_CRT1Table[index].CR[6];
drivers/video/fbdev/sis/init301.c
3361
tempcx = SiS_Pr->SiS_CRT1Table[index].CR[13] << 8;
drivers/video/fbdev/sis/init301.c
3365
temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7];
drivers/video/fbdev/sis/init301.c
6370
cr4 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4];
drivers/video/fbdev/sis/init301.c
6371
cr14 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
drivers/video/fbdev/sis/init301.c
6372
cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5];
drivers/video/fbdev/sis/init301.c
6373
cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15];
drivers/video/fbdev/sis/init301.c
6458
cr8 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[8];
drivers/video/fbdev/sis/init301.c
6459
cr7 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
drivers/video/fbdev/sis/init301.c
6460
cr13 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
drivers/video/fbdev/sis/init301.c
6461
tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[9];
drivers/video/fbdev/sis/init301.c
6787
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
drivers/video/fbdev/sis/init301.c
6788
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
drivers/video/fbdev/sis/init301.c
6790
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
6793
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
6796
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
6798
SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
drivers/video/fbdev/sis/init301.c
6799
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
drivers/video/fbdev/sis/init301.c
7298
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
drivers/video/fbdev/sis/init301.c
7299
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
drivers/video/fbdev/sis/init301.c
7301
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
7304
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
7307
SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
drivers/video/fbdev/sis/init301.c
7309
SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
drivers/video/fbdev/sis/init301.c
7310
SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
drivers/video/fbdev/sis/init301.c
8060
tempah = (LVDSCRT1Ptr + ResIndex)->CR[i];
drivers/video/fbdev/sis/init301.c
8065
tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
drivers/video/fbdev/sis/init301.c
8069
tempah = (LVDSCRT1Ptr + ResIndex)->CR[14] & 0xE0;
drivers/video/fbdev/sis/init301.c
8075
tempah = ((LVDSCRT1Ptr + ResIndex)->CR[14] & 0x01) << 5;
drivers/video/fbdev/sis/initextlfb.c
116
(unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
drivers/video/fbdev/sis/initextlfb.c
199
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
drivers/video/fbdev/sis/initextlfb.c
200
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
drivers/video/fbdev/sis/initextlfb.c
203
sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
drivers/video/fbdev/sis/initextlfb.c
204
cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
drivers/video/fbdev/sis/initextlfb.c
205
cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
drivers/video/fbdev/sis/vstruct.h
173
unsigned char CR[12];
drivers/video/fbdev/sis/vstruct.h
177
unsigned char CR[17];
drivers/video/fbdev/sis/vstruct.h
99
unsigned char CR[15];
fs/gfs2/trace_gfs2.h
25
dlm_state_name(CR), \
net/ethtool/common.c
146
__DEFINE_LINK_MODE_NAME(25000, CR, Full),
net/ethtool/common.c
157
__DEFINE_LINK_MODE_NAME(10000, CR, Full),
net/ethtool/common.c
169
__DEFINE_LINK_MODE_NAME(50000, CR, Full),
net/ethtool/common.c
194
__DEFINE_LINK_MODE_NAME(100000, CR, Full),
net/ethtool/common.c
218
__DEFINE_LINK_MODE_NAME(200000, CR, Full),
net/ethtool/common.c
364
__DEFINE_LINK_MODE_PARAMS(25000, CR, Full, C),
net/ethtool/common.c
377
__DEFINE_LINK_MODE_PARAMS(10000, CR, Full, C),
net/ethtool/common.c
389
__DEFINE_LINK_MODE_PARAMS(50000, CR, Full, C),
net/ethtool/common.c
419
__DEFINE_LINK_MODE_PARAMS(100000, CR, Full, C),
net/ethtool/common.c
445
__DEFINE_LINK_MODE_PARAMS(200000, CR, Full, C),
sound/soc/atmel/atmel_ssc_dai.c
291
ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
sound/soc/atmel/atmel_ssc_dai.c
363
ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
sound/soc/atmel/atmel_ssc_dai.c
727
ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
sound/soc/atmel/atmel_ssc_dai.c
755
ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable);
sound/soc/atmel/atmel_ssc_dai.c
758
ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
sound/soc/atmel/atmel_ssc_dai.c
777
ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS));
sound/soc/atmel/atmel_ssc_dai.c
819
ssc_writel(ssc_p->ssc->regs, CR, cr);
sound/spi/at73c213.c
1057
ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
sound/spi/at73c213.c
1078
ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
sound/spi/at73c213.c
828
ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
sound/spi/at73c213.c
842
ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
sound/spi/at73c213.c
993
ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));