rmw
voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
voltdm->rmw(vc->common->i2c_cfg_clear_mask,
voltdm->rmw(vc->common->i2c_mcode_mask,
voltdm->rmw(vc->smps_sa_mask,
voltdm->rmw(vc->smps_volra_mask,
voltdm->rmw(vc->smps_cmdra_mask,
u32 (*rmw)(u32 mask, u32 bits, u8 offset);
.rmw = omap3_prm_vcvp_rmw,
.rmw = omap3_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
.rmw = omap4_prm_vcvp_rmw,
voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
struct dt9812_rmw_byte rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
struct dt9812_rmw_byte *rmw)
cmd->u.rmw_multi_info.rmw[i] = rmw[i];
struct dt9812_rmw_byte *rmw, int channel)
rmw->address = F020_SFR_P1;
rmw->and_mask = 0xe0;
rmw->or_value = channel << 5;
rmw->address = F020_SFR_AMX0SL;
rmw->and_mask = 0xff;
rmw->or_value = channel & 0x07;
struct dt9812_rmw_byte *rmw,
rmw->address = F020_SFR_ADC0CF;
rmw->and_mask = F020_MASK_ADC0CF_AMP0GN2 |
rmw->or_value = F020_MASK_ADC0CF_AMP0GN2 |
rmw->or_value = 0x00;
rmw->or_value = F020_MASK_ADC0CF_AMP0GN0;
rmw->or_value = F020_MASK_ADC0CF_AMP0GN1;
rmw->or_value = F020_MASK_ADC0CF_AMP0GN1 |
rmw->or_value = F020_MASK_ADC0CF_AMP0GN2;
struct dt9812_rmw_byte rmw[3];
dt9812_configure_gain(dev, &rmw[0], gain);
dt9812_configure_mux(dev, &rmw[1], channel);
rmw[2].address = F020_SFR_ADC0CN;
rmw[2].and_mask = 0xff;
rmw[2].or_value = F020_MASK_ADC0CN_AD0EN | F020_MASK_ADC0CN_AD0BUSY;
ret = dt9812_rmw_multiple_registers(dev, 3, rmw);
struct dt9812_rmw_byte rmw[3];
rmw[0].address = F020_SFR_DAC0CN;
rmw[0].and_mask = 0xff;
rmw[0].or_value = F020_MASK_DACXCN_DACXEN;
rmw[1].address = F020_SFR_DAC0L;
rmw[1].and_mask = 0xff;
rmw[1].or_value = value & 0xff;
rmw[2].address = F020_SFR_DAC0H;
rmw[2].and_mask = 0xff;
rmw[2].or_value = (value >> 8) & 0xf;
rmw[0].address = F020_SFR_DAC1CN;
rmw[0].and_mask = 0xff;
rmw[0].or_value = F020_MASK_DACXCN_DACXEN;
rmw[1].address = F020_SFR_DAC1L;
rmw[1].and_mask = 0xff;
rmw[1].or_value = value & 0xff;
rmw[2].address = F020_SFR_DAC1H;
rmw[2].and_mask = 0xff;
rmw[2].or_value = (value >> 8) & 0xf;
ret = dt9812_rmw_multiple_registers(dev, 3, rmw);
int rmw = 0, rcw = 0, i;
rcw = 1; rmw = 2;
rcw = 1; rmw = 2;
rmw++;
rmw += 2*disks; /* cannot read it */
(unsigned long long)sh->sector, sh->state, rmw, rcw);
if ((rmw < rcw || (rmw == rcw && conf->rmw_level == PARITY_PREFER_RMW)) && rmw > 0) {
sh->sector, rmw);
if ((rcw < rmw || (rcw == rmw && conf->rmw_level != PARITY_PREFER_RMW)) && rcw > 0) {
if (rcw > disks && rmw > disks &&
(s->locked == 0 && (rcw == 0 || rmw == 0) &&
u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
ah->reg_ops.rmw = ath9k_reg_rmw;
(_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr))
ah->reg_ops.rmw = ath9k_reg_rmw;
.rmw = mt76_mmio_rmw,
#define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__)
#define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
return dev->bus_ops->rmw(mdev, addr, mask, val);
bus_ops->rmw = mt7603_rmw;
return dev->bus_ops->rmw(mdev, addr, mask, val);
bus_ops->rmw = mt7615_rmw;
.rmw = mt76s_rmw,
.rmw = mt7663u_rmw,
dev->bus_ops->rmw(&dev->mt76, l1_remap,
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2,
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2_MT7916 + ofs,
return dev->bus_ops->rmw(mdev, addr, mask, val);
val = dev->bus_ops->rmw(mdev, __mt7915_reg_remap_addr(dev, offset), mask, val);
bus_ops->rmw = mt7915_rmw;
return dev->bus_ops->rmw(mdev, addr, mask, val);
bus_ops->rmw = mt7921_rmw;
.rmw = mt76s_rmw,
.rmw = mt792xu_rmw,
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1,
return dev->bus_ops->rmw(mdev, addr, mask, val);
bus_ops->rmw = mt7925_rmw;
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1,
.rmw = mt792xu_rmw,
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1, l1_mask, val);
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2, l2_mask, val);
dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_CBTOP,
return dev->bus_ops->rmw(mdev, addr, mask, val);
val = dev->bus_ops->rmw(mdev, __mt7996_reg_remap_addr(dev, offset), mask, val);
bus_ops->rmw = mt7996_rmw;
.rmw = mt76u_rmw,
rmw(dst);
rmw(dst++);
rmw(where);
rmw(where+1);
rmw(dst);
bool rmw;
rmw = first || last;
rmw ? "" : "no ");
if (rmw) {
rmw ? 1 : 0, rmw ? 2 : 1,
osd_req_op_extent_osd_data_pages(req, rmw ? 1 : 0, pages, write_len,
if (rmw) {
WARN_ON_ONCE(!rmw);