rtsn_write
rtsn_write(priv, RDIE0, RDIE_RDID_RDX(RX_CHAIN_IDX));
rtsn_write(priv, TDID0, TDIE_TDID_TDX(TX_CHAIN_IDX));
rtsn_write(priv, RDID0, RDIE_RDID_RDX(RX_CHAIN_IDX));
rtsn_write(priv, TRCR0, BIT(TX_CHAIN_IDX));
rtsn_write(priv, OCR, mode);
rtsn_write(priv, TDIS0, TDIS_TDS(TX_CHAIN_IDX));
rtsn_write(priv, RDIS0, RDIS_RDS(RX_CHAIN_IDX));
rtsn_write(priv, AXIWC, AXIWC_DEFAULT);
rtsn_write(priv, AXIRC, AXIRC_DEFAULT);
rtsn_write(priv, TATLS0, TATLS0_TEDE | TATLS0_TATEN(TX_CHAIN_IDX));
rtsn_write(priv, TATLS1, priv->tx_desc_bat_dma + TX_CHAIN_ADDR_OFFSET);
rtsn_write(priv, TATLR, TATLR_TATL);
rtsn_write(priv, RATLS0,
rtsn_write(priv, RATLS1, priv->rx_desc_bat_dma + RX_CHAIN_ADDR_OFFSET);
rtsn_write(priv, RATLR, RATLR_RATL);
rtsn_write(priv, TGC1, TGC1_STTV_DEFAULT | TGC1_TQTM_SFM);
rtsn_write(priv, TMS0, TMS_MFS_MAX);
rtsn_write(priv, CFCR0, CFCR_SDID(RX_CHAIN_IDX));
rtsn_write(priv, FMSCR, FMSCR_FMSIE(RX_CHAIN_IDX));
rtsn_write(priv, MRMAC0, (mac_addr[0] << 8) | mac_addr[1]);
rtsn_write(priv, MRMAC1, (mac_addr[2] << 24) | (mac_addr[3] << 16) |
rtsn_write(priv, MPSM, val);
rtsn_write(priv, reg, (rtsn_read(priv, reg) & ~clear) | set);
rtsn_write(priv, TDIE0, TDIE_TDID_TDX(TX_CHAIN_IDX));