rtl92du_phy_set_bb_reg_1byte
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BCCKEN, 0x00);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BCCKEN, 0x00);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BRFMOD, 0x0);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BCCKEN | BOFDMEN, 0);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD, BCCKEN | BOFDMEN, 0x3);
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD,
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD,
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD,
rtl92du_phy_set_bb_reg_1byte(hw, RFPGA0_RFMOD,